Control flow - mbits-mirafra/verilator GitHub Wiki

break:

                                          
module break_sv;

int array[5];

initial 
begin
  // In the following loop break is used at index 2 so that 
  // the loops stops at index 2 and comes out of loop.
  foreach(array[i])
    if(i==2)begin
      $display("----Calling break----"); 
      break;
    end
      else
      begin
        array[i]=i;
        $display("array[%0d]=%0d",i,array[i]);
      end
    end
    endmodule

Output:

Continue:

                                          
module continue_sv;

  int array[5];

    initial 
        begin
foreach(array[i])
    begin
      if(i==2)begin
        $display("-----Calling Continue----");
        continue;
      end
        else
          array[i]=i;
          $display("array[%0d]=%0d",i,array[i]);
        end
      end
      endmodule

Output:

disable task:

                                          
module nested_loop;
  initial 
  begin
    $display("\t ----nested loop output ---\n");
    nes();
  end

  task nes();
      for (int i=1;i<=3;i++)
      begin
        for(int j=1;j<=3;j++)
        begin
          if(i==2)
          begin
            disable nes;
          end
          $display("\t i= %0d , j= %0d ",i,j);
        end
      end
    endtask
endmodule:nested_loop

ERROR: