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Zilog NMOS Date Code 8039

/images/zilog_nmos_8039/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_nmos_8039/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture0.png) /images/zilog_nmos_8039/6_0MHz/capture0.png
[/images/zilog_nmos_8039/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture1.png) /images/zilog_nmos_8039/6_0MHz/capture1.png
[/images/zilog_nmos_8039/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture2.png) /images/zilog_nmos_8039/6_0MHz/capture2.png
[/images/zilog_nmos_8039/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture3.png) /images/zilog_nmos_8039/6_0MHz/capture3.png
[/images/zilog_nmos_8039/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture4.png) /images/zilog_nmos_8039/6_0MHz/capture4.png
[/images/zilog_nmos_8039/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture5.png) /images/zilog_nmos_8039/6_0MHz/capture5.png
[/images/zilog_nmos_8039/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture6.png) /images/zilog_nmos_8039/6_0MHz/capture6.png
[/images/zilog_nmos_8039/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture7.png) /images/zilog_nmos_8039/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_nmos_8039/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture8.png) /images/zilog_nmos_8039/6_0MHz/capture8.png
[/images/zilog_nmos_8039/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture9.png) /images/zilog_nmos_8039/6_0MHz/capture9.png
[/images/zilog_nmos_8039/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture10.png) /images/zilog_nmos_8039/6_0MHz/capture10.png
[/images/zilog_nmos_8039/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture11.png) /images/zilog_nmos_8039/6_0MHz/capture11.png
[/images/zilog_nmos_8039/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture12.png) /images/zilog_nmos_8039/6_0MHz/capture12.png
[/images/zilog_nmos_8039/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture13.png) /images/zilog_nmos_8039/6_0MHz/capture13.png
[/images/zilog_nmos_8039/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture14.png) /images/zilog_nmos_8039/6_0MHz/capture14.png
[/images/zilog_nmos_8039/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8039/3_5MHz/capture15.png) /images/zilog_nmos_8039/6_0MHz/capture15.png

Zilog NMOS Date Code 8644

/images/zilog_nmos_8644/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_nmos_8644/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture0.png) /images/zilog_nmos_8644/6_0MHz/capture0.png
[/images/zilog_nmos_8644/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture1.png) /images/zilog_nmos_8644/6_0MHz/capture1.png
[/images/zilog_nmos_8644/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture2.png) /images/zilog_nmos_8644/6_0MHz/capture2.png
[/images/zilog_nmos_8644/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture3.png) /images/zilog_nmos_8644/6_0MHz/capture3.png
[/images/zilog_nmos_8644/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture4.png) /images/zilog_nmos_8644/6_0MHz/capture4.png
[/images/zilog_nmos_8644/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture5.png) /images/zilog_nmos_8644/6_0MHz/capture5.png
[/images/zilog_nmos_8644/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture6.png) /images/zilog_nmos_8644/6_0MHz/capture6.png
[/images/zilog_nmos_8644/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture7.png) /images/zilog_nmos_8644/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_nmos_8644/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture8.png) /images/zilog_nmos_8644/6_0MHz/capture8.png
[/images/zilog_nmos_8644/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture9.png) /images/zilog_nmos_8644/6_0MHz/capture9.png
[/images/zilog_nmos_8644/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture10.png) /images/zilog_nmos_8644/6_0MHz/capture10.png
[/images/zilog_nmos_8644/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture11.png) /images/zilog_nmos_8644/6_0MHz/capture11.png
[/images/zilog_nmos_8644/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture12.png) /images/zilog_nmos_8644/6_0MHz/capture12.png
[/images/zilog_nmos_8644/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture13.png) /images/zilog_nmos_8644/6_0MHz/capture13.png
[/images/zilog_nmos_8644/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture14.png) /images/zilog_nmos_8644/6_0MHz/capture14.png
[/images/zilog_nmos_8644/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8644/3_5MHz/capture15.png) /images/zilog_nmos_8644/6_0MHz/capture15.png

Zilog NMOS Date Code 8811

/images/zilog_nmos_8811/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_nmos_8811/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture0.png) /images/zilog_nmos_8811/6_0MHz/capture0.png
[/images/zilog_nmos_8811/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture1.png) /images/zilog_nmos_8811/6_0MHz/capture1.png
[/images/zilog_nmos_8811/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture2.png) /images/zilog_nmos_8811/6_0MHz/capture2.png
[/images/zilog_nmos_8811/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture3.png) /images/zilog_nmos_8811/6_0MHz/capture3.png
[/images/zilog_nmos_8811/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture4.png) /images/zilog_nmos_8811/6_0MHz/capture4.png
[/images/zilog_nmos_8811/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture5.png) /images/zilog_nmos_8811/6_0MHz/capture5.png
[/images/zilog_nmos_8811/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture6.png) /images/zilog_nmos_8811/6_0MHz/capture6.png
[/images/zilog_nmos_8811/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture7.png) /images/zilog_nmos_8811/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_nmos_8811/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture8.png) /images/zilog_nmos_8811/6_0MHz/capture8.png
[/images/zilog_nmos_8811/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture9.png) /images/zilog_nmos_8811/6_0MHz/capture9.png
[/images/zilog_nmos_8811/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture10.png) /images/zilog_nmos_8811/6_0MHz/capture10.png
[/images/zilog_nmos_8811/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture11.png) /images/zilog_nmos_8811/6_0MHz/capture11.png
[/images/zilog_nmos_8811/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture12.png) /images/zilog_nmos_8811/6_0MHz/capture12.png
[/images/zilog_nmos_8811/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture13.png) /images/zilog_nmos_8811/6_0MHz/capture13.png
[/images/zilog_nmos_8811/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture14.png) /images/zilog_nmos_8811/6_0MHz/capture14.png
[/images/zilog_nmos_8811/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8811/3_5MHz/capture15.png) /images/zilog_nmos_8811/6_0MHz/capture15.png

Zilog NMOS Date Code 8817

/images/zilog_nmos_8817/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_nmos_8817/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture0.png) /images/zilog_nmos_8817/6_0MHz/capture0.png
[/images/zilog_nmos_8817/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture1.png) /images/zilog_nmos_8817/6_0MHz/capture1.png
[/images/zilog_nmos_8817/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture2.png) /images/zilog_nmos_8817/6_0MHz/capture2.png
[/images/zilog_nmos_8817/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture3.png) /images/zilog_nmos_8817/6_0MHz/capture3.png
[/images/zilog_nmos_8817/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture4.png) /images/zilog_nmos_8817/6_0MHz/capture4.png
[/images/zilog_nmos_8817/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture5.png) /images/zilog_nmos_8817/6_0MHz/capture5.png
[/images/zilog_nmos_8817/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture6.png) /images/zilog_nmos_8817/6_0MHz/capture6.png
[/images/zilog_nmos_8817/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture7.png) /images/zilog_nmos_8817/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_nmos_8817/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture8.png) /images/zilog_nmos_8817/6_0MHz/capture8.png
[/images/zilog_nmos_8817/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture9.png) /images/zilog_nmos_8817/6_0MHz/capture9.png
[/images/zilog_nmos_8817/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture10.png) /images/zilog_nmos_8817/6_0MHz/capture10.png
[/images/zilog_nmos_8817/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture11.png) /images/zilog_nmos_8817/6_0MHz/capture11.png
[/images/zilog_nmos_8817/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture12.png) /images/zilog_nmos_8817/6_0MHz/capture12.png
[/images/zilog_nmos_8817/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture13.png) /images/zilog_nmos_8817/6_0MHz/capture13.png
[/images/zilog_nmos_8817/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture14.png) /images/zilog_nmos_8817/6_0MHz/capture14.png
[/images/zilog_nmos_8817/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_nmos_8817/3_5MHz/capture15.png) /images/zilog_nmos_8817/6_0MHz/capture15.png

SGS NMOS

/images/sgs_nmos/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/sgs_nmos/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture0.png) /images/sgs_nmos/6_0MHz/capture0.png
[/images/sgs_nmos/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture1.png) /images/sgs_nmos/6_0MHz/capture1.png
[/images/sgs_nmos/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture2.png) /images/sgs_nmos/6_0MHz/capture2.png
[/images/sgs_nmos/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture3.png) /images/sgs_nmos/6_0MHz/capture3.png
[/images/sgs_nmos/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture4.png) /images/sgs_nmos/6_0MHz/capture4.png
[/images/sgs_nmos/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture5.png) /images/sgs_nmos/6_0MHz/capture5.png
[/images/sgs_nmos/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture6.png) /images/sgs_nmos/6_0MHz/capture6.png
[/images/sgs_nmos/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture7.png) /images/sgs_nmos/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/sgs_nmos/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture8.png) /images/sgs_nmos/6_0MHz/capture8.png
[/images/sgs_nmos/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture9.png) /images/sgs_nmos/6_0MHz/capture9.png
[/images/sgs_nmos/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture10.png) /images/sgs_nmos/6_0MHz/capture10.png
[/images/sgs_nmos/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture11.png) /images/sgs_nmos/6_0MHz/capture11.png
[/images/sgs_nmos/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture12.png) /images/sgs_nmos/6_0MHz/capture12.png
[/images/sgs_nmos/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture13.png) /images/sgs_nmos/6_0MHz/capture13.png
[/images/sgs_nmos/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture14.png) /images/sgs_nmos/6_0MHz/capture14.png
[/images/sgs_nmos/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/sgs_nmos/3_5MHz/capture15.png) /images/sgs_nmos/6_0MHz/capture15.png

NEC NMOS

/images/nec_nmos/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/nec_nmos/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture0.png) /images/nec_nmos/6_0MHz/capture0.png
[/images/nec_nmos/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture1.png) /images/nec_nmos/6_0MHz/capture1.png
[/images/nec_nmos/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture2.png) /images/nec_nmos/6_0MHz/capture2.png
[/images/nec_nmos/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture3.png) /images/nec_nmos/6_0MHz/capture3.png
[/images/nec_nmos/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture4.png) /images/nec_nmos/6_0MHz/capture4.png
[/images/nec_nmos/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture5.png) /images/nec_nmos/6_0MHz/capture5.png
[/images/nec_nmos/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture6.png) /images/nec_nmos/6_0MHz/capture6.png
[/images/nec_nmos/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture7.png) /images/nec_nmos/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/nec_nmos/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture8.png) /images/nec_nmos/6_0MHz/capture8.png
[/images/nec_nmos/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture9.png) /images/nec_nmos/6_0MHz/capture9.png
[/images/nec_nmos/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture10.png) /images/nec_nmos/6_0MHz/capture10.png
[/images/nec_nmos/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture11.png) /images/nec_nmos/6_0MHz/capture11.png
[/images/nec_nmos/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture12.png) /images/nec_nmos/6_0MHz/capture12.png
[/images/nec_nmos/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture13.png) /images/nec_nmos/6_0MHz/capture13.png
[/images/nec_nmos/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture14.png) /images/nec_nmos/6_0MHz/capture14.png
[/images/nec_nmos/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_nmos/3_5MHz/capture15.png) /images/nec_nmos/6_0MHz/capture15.png

Zilog CMOS Date Code 9044

/images/zilog_cmos_9044/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_cmos_9044/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture0.png) /images/zilog_cmos_9044/6_0MHz/capture0.png
[/images/zilog_cmos_9044/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture1.png) /images/zilog_cmos_9044/6_0MHz/capture1.png
[/images/zilog_cmos_9044/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture2.png) /images/zilog_cmos_9044/6_0MHz/capture2.png
[/images/zilog_cmos_9044/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture3.png) /images/zilog_cmos_9044/6_0MHz/capture3.png
[/images/zilog_cmos_9044/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture4.png) /images/zilog_cmos_9044/6_0MHz/capture4.png
[/images/zilog_cmos_9044/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture5.png) /images/zilog_cmos_9044/6_0MHz/capture5.png
[/images/zilog_cmos_9044/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture6.png) /images/zilog_cmos_9044/6_0MHz/capture6.png
[/images/zilog_cmos_9044/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture7.png) /images/zilog_cmos_9044/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_cmos_9044/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture8.png) /images/zilog_cmos_9044/6_0MHz/capture8.png
[/images/zilog_cmos_9044/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture9.png) /images/zilog_cmos_9044/6_0MHz/capture9.png
[/images/zilog_cmos_9044/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture10.png) /images/zilog_cmos_9044/6_0MHz/capture10.png
[/images/zilog_cmos_9044/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture11.png) /images/zilog_cmos_9044/6_0MHz/capture11.png
[/images/zilog_cmos_9044/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture12.png) /images/zilog_cmos_9044/6_0MHz/capture12.png
[/images/zilog_cmos_9044/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture13.png) /images/zilog_cmos_9044/6_0MHz/capture13.png
[/images/zilog_cmos_9044/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture14.png) /images/zilog_cmos_9044/6_0MHz/capture14.png
[/images/zilog_cmos_9044/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_9044/3_5MHz/capture15.png) /images/zilog_cmos_9044/6_0MHz/capture15.png

Zilog CMOS Date Code 0047

/images/zilog_cmos_0047/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_cmos_0047/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture0.png) /images/zilog_cmos_0047/6_0MHz/capture0.png
[/images/zilog_cmos_0047/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture1.png) /images/zilog_cmos_0047/6_0MHz/capture1.png
[/images/zilog_cmos_0047/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture2.png) /images/zilog_cmos_0047/6_0MHz/capture2.png
[/images/zilog_cmos_0047/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture3.png) /images/zilog_cmos_0047/6_0MHz/capture3.png
[/images/zilog_cmos_0047/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture4.png) /images/zilog_cmos_0047/6_0MHz/capture4.png
[/images/zilog_cmos_0047/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture5.png) /images/zilog_cmos_0047/6_0MHz/capture5.png
[/images/zilog_cmos_0047/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture6.png) /images/zilog_cmos_0047/6_0MHz/capture6.png
[/images/zilog_cmos_0047/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture7.png) /images/zilog_cmos_0047/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_cmos_0047/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture8.png) /images/zilog_cmos_0047/6_0MHz/capture8.png
[/images/zilog_cmos_0047/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture9.png) /images/zilog_cmos_0047/6_0MHz/capture9.png
[/images/zilog_cmos_0047/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture10.png) /images/zilog_cmos_0047/6_0MHz/capture10.png
[/images/zilog_cmos_0047/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture11.png) /images/zilog_cmos_0047/6_0MHz/capture11.png
[/images/zilog_cmos_0047/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture12.png) /images/zilog_cmos_0047/6_0MHz/capture12.png
[/images/zilog_cmos_0047/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture13.png) /images/zilog_cmos_0047/6_0MHz/capture13.png
[/images/zilog_cmos_0047/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture14.png) /images/zilog_cmos_0047/6_0MHz/capture14.png
[/images/zilog_cmos_0047/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_0047/3_5MHz/capture15.png) /images/zilog_cmos_0047/6_0MHz/capture15.png

Zilog CMOS Date Code 1930

/images/zilog_cmos_1930/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_cmos_1930/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture0.png) /images/zilog_cmos_1930/6_0MHz/capture0.png
[/images/zilog_cmos_1930/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture1.png) /images/zilog_cmos_1930/6_0MHz/capture1.png
[/images/zilog_cmos_1930/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture2.png) /images/zilog_cmos_1930/6_0MHz/capture2.png
[/images/zilog_cmos_1930/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture3.png) /images/zilog_cmos_1930/6_0MHz/capture3.png
[/images/zilog_cmos_1930/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture4.png) /images/zilog_cmos_1930/6_0MHz/capture4.png
[/images/zilog_cmos_1930/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture5.png) /images/zilog_cmos_1930/6_0MHz/capture5.png
[/images/zilog_cmos_1930/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture6.png) /images/zilog_cmos_1930/6_0MHz/capture6.png
[/images/zilog_cmos_1930/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture7.png) /images/zilog_cmos_1930/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/zilog_cmos_1930/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture8.png) /images/zilog_cmos_1930/6_0MHz/capture8.png
[/images/zilog_cmos_1930/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture9.png) /images/zilog_cmos_1930/6_0MHz/capture9.png
[/images/zilog_cmos_1930/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture10.png) /images/zilog_cmos_1930/6_0MHz/capture10.png
[/images/zilog_cmos_1930/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture11.png) /images/zilog_cmos_1930/6_0MHz/capture11.png
[/images/zilog_cmos_1930/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture12.png) /images/zilog_cmos_1930/6_0MHz/capture12.png
[/images/zilog_cmos_1930/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture13.png) /images/zilog_cmos_1930/6_0MHz/capture13.png
[/images/zilog_cmos_1930/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture14.png) /images/zilog_cmos_1930/6_0MHz/capture14.png
[/images/zilog_cmos_1930/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/zilog_cmos_1930/3_5MHz/capture15.png) /images/zilog_cmos_1930/6_0MHz/capture15.png

ST CMOS

/images/st_cmos/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/st_cmos/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture0.png) /images/st_cmos/6_0MHz/capture0.png
[/images/st_cmos/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture1.png) /images/st_cmos/6_0MHz/capture1.png
[/images/st_cmos/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture2.png) /images/st_cmos/6_0MHz/capture2.png
[/images/st_cmos/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture3.png) /images/st_cmos/6_0MHz/capture3.png
[/images/st_cmos/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture4.png) /images/st_cmos/6_0MHz/capture4.png
[/images/st_cmos/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture5.png) /images/st_cmos/6_0MHz/capture5.png
[/images/st_cmos/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture6.png) /images/st_cmos/6_0MHz/capture6.png
[/images/st_cmos/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture7.png) /images/st_cmos/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/st_cmos/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture8.png) /images/st_cmos/6_0MHz/capture8.png
[/images/st_cmos/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture9.png) /images/st_cmos/6_0MHz/capture9.png
[/images/st_cmos/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture10.png) /images/st_cmos/6_0MHz/capture10.png
[/images/st_cmos/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture11.png) /images/st_cmos/6_0MHz/capture11.png
[/images/st_cmos/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture12.png) /images/st_cmos/6_0MHz/capture12.png
[/images/st_cmos/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture13.png) /images/st_cmos/6_0MHz/capture13.png
[/images/st_cmos/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture14.png) /images/st_cmos/6_0MHz/capture14.png
[/images/st_cmos/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/st_cmos/3_5MHz/capture15.png) /images/st_cmos/6_0MHz/capture15.png

NEC CMOS

/images/nec_cmos/cpu.jpg

X Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/nec_cmos/2_0MHz/capture0.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture0.png) /images/nec_cmos/6_0MHz/capture0.png
[/images/nec_cmos/2_0MHz/capture1.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture1.png) /images/nec_cmos/6_0MHz/capture1.png
[/images/nec_cmos/2_0MHz/capture2.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture2.png) /images/nec_cmos/6_0MHz/capture2.png
[/images/nec_cmos/2_0MHz/capture3.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture3.png) /images/nec_cmos/6_0MHz/capture3.png
[/images/nec_cmos/2_0MHz/capture4.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture4.png) /images/nec_cmos/6_0MHz/capture4.png
[/images/nec_cmos/2_0MHz/capture5.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture5.png) /images/nec_cmos/6_0MHz/capture5.png
[/images/nec_cmos/2_0MHz/capture6.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture6.png) /images/nec_cmos/6_0MHz/capture6.png
[/images/nec_cmos/2_0MHz/capture7.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture7.png) /images/nec_cmos/6_0MHz/capture7.png

Y Flag

2.0 MHz Clock 3.5 MHz Clock 6.0 MHz Clock
[/images/nec_cmos/2_0MHz/capture8.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture8.png) /images/nec_cmos/6_0MHz/capture8.png
[/images/nec_cmos/2_0MHz/capture9.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture9.png) /images/nec_cmos/6_0MHz/capture9.png
[/images/nec_cmos/2_0MHz/capture10.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture10.png) /images/nec_cmos/6_0MHz/capture10.png
[/images/nec_cmos/2_0MHz/capture11.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture11.png) /images/nec_cmos/6_0MHz/capture11.png
[/images/nec_cmos/2_0MHz/capture12.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture12.png) /images/nec_cmos/6_0MHz/capture12.png
[/images/nec_cmos/2_0MHz/capture13.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture13.png) /images/nec_cmos/6_0MHz/capture13.png
[/images/nec_cmos/2_0MHz/capture14.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture14.png) /images/nec_cmos/6_0MHz/capture14.png
[/images/nec_cmos/2_0MHz/capture15.png]] ](/hoglet67/Z80Decoder/wiki/[[/images/nec_cmos/3_5MHz/capture15.png) /images/nec_cmos/6_0MHz/capture15.png