UART - glennlopez/EmbeddedSystems.Playground GitHub Wiki

UART Address definitions

#define UART0_DR_R              (*((volatile unsigned long *)0x4000C000))
#define UART0_FR_R              (*((volatile unsigned long *)0x4000C018))
#define UART0_IBRD_R            (*((volatile unsigned long *)0x4000C024))
#define UART0_FBRD_R            (*((volatile unsigned long *)0x4000C028))
#define UART0_LCRH_R            (*((volatile unsigned long *)0x4000C02C))
#define UART0_CTL_R             (*((volatile unsigned long *)0x4000C030))

#define SYSCTL_RCGC1_R          (*((volatile unsigned long *)0x400FE104))
#define SYSCTL_RCGC2_R          (*((volatile unsigned long *)0x400FE108))

UART initialisation

void UART_Init(void){
  // Step 1:
  SYSCTL_RCGC1_R |= 0x00000001; // activate UART0
  SYSCTL_RCGC2_R |= 0x00000001; // activate port A
  
  // Step 2:
  UART0_CTL_R &= ~0x00000001; // disable UART
  UART0_IBRD_R = 27;  // IBRD = int(50,000,000 / (16 * 115,200)) = int(27.1267)
  UART0_FBRD_R = 8;   // FBRD = int(0.1267 * 64 + 0.5) = 8                     
  UART0_LCRH_R = (0x00000060|0x00000010); // 8 bit word length 
  UART0_CTL_R |= 0x00000001; // enable UART
  
  // Step 3:
  GPIO_PORTA_AFSEL_R |= 0x03;  // enable alt funct on PA1-0
  GPIO_PORTA_DEN_R |= 0x03;  // enable digital I/O on PA1-0                                  
  GPIO_PORTA_PCTL_R = (GPIO_PORTA_PCTL_R&0xFFFFFF00)+0x00000011;  // configure PA1-0 as UART
  GPIO_PORTA_AMSEL_R &= ~0x03;  // disable analog functionality on PA
}
  1. Activate clock gate controls for your desired UART and GPIO ports:
    • UART clock gate control is under the RCGC1 register
    • GPIO clock gate control is under the RCGC2 register
  2. Configure the UART registers:
    • Disable the UART module using UARTEN under the UARTCTL
    • Calculate/Set the Baud Rate's Integer and Fractional value:
      • UARTIBRD = (Clock speed / (16 * Desired Baud rate))
        • `ie: (50,000,000 / (16 * 115,200)) = (27.1267) = 27`
      • UARTFBRD = (UARTIBRD's -nth remainder * 64 + 0.5)
        • `ie: (0.1267 * 64 + 0.5) = 8 `
    • Set the number of bits to be transmited using WLEN under the UARTLCRH register
    • Enable FIFO using FEN under the UARTLCRH register
    • Re-enable the UART module using UARTEN under the UARTCTL register
  3. Configure the GPIO registers:
    • Enable Alternative Function for UART's TX and RX under the GPIOAFSEL register
    • Enable Digital Pins for UART's TX and RX under the GPIODEN register
    • Configure which bits in the GPIOPCTL register need be the alternative function
      • `ie: GPIO_PORTA_PCTL_R = (GPIO_PORTA_PCTL_R&0xFFFFFF00)+0x00000011; `
    • Disable analog functionality on TX and RX bits under the GPIOAMSEL register

UART device driver routine (input)

unsigned char UART_InChar(void){
    while((UART0_FR_R&0x00000010) != 0); // Step 1
    return((unsigned char)(UART0_DR_R&0xFF)); // Step 2
}
  1. Check RXFE (Recievier FIFO Empty) flag under the UARTFR register:
    • Keep checking RXFE until the flag is 0 (1 = Empty | 0 = Not empty):
      • `UART0_FR_R&0x00000010` will mask out every bit on the UARTFR register except RXFE
      • ` != 0 ` will keep checking the UARTFR register until the RXFE is 1
      • ` while((UART0_FR_R&0x00000010) != 0); ` this statement will only be true if RXFF is 1 since every other bit on the UART0_FR_R register was masked out using &0x00000010
  2. Once RXFE flag is 0 (RXFE is not empty):
    • Read the data from UARTDR register (read only the first 8 bits: UARTDR&0xFF)
    • Return the data

UART device driver routine (output)

void UART_OutChar(unsigned char data){
    while((UART0_FR_R&0x00000020) != 0); // Step 1
    UART0_DR_R = data; // Step 2
}
  1. Check TXFF (Transmit FIFO Full) flag under the UARTFR register:
    • Keep checking TXFF until the flag is 0 (1 = Full | 0 = Not full)
      • `UART0_FR_R&0x00000020` will mask out every bit on the UARTFR register except TXFF
      • ` != 0 ` will keep checking the UARTFR register until the TXFF is 1
      • ` while((UART0_FR_R&0x00000020) != 0); ` this statement will only be true if TXFF is 1 since every other bit on the UART0_FR_R register was masked out using &0x00000020
  2. Once TXFF flag is 0 (TXFF is not full):
    • Write the data into the UARTDR's data register
https://d37djvu3ytnwxt.cloudfront.net/assets/courseware/v1/d76b68c20edca14b980a6b5ca72eac0c/asset-v1:UTAustinX+UT.6.03x+1T2016+type@asset+block/Fig04_34_UARTFlowcharts.jpg

Note: The guides in these wiki are quick reference guides I made for myself and should not be used for teaching as they may contain errors that could misinform students. If you are a student, make sure you confirm everything you read on this wiki using the datasheet before fully committing to the information on this wiki.

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