This is a revolving list of tasks that we need to do. Priorities change constantly.

Table of Contents Current Items Unassigned bpadalino jynik Future Items

• Parse NMEA messages from GPS in FPGA for timestamping
• Add ability to 'reset on next 1pps' signal for TX/RX sample synchronization
• Fix or remove FS USB descriptors.

• Automatic IQ Calibration
• Create and simulate HDL models
• Create signal generator block for FPGA

• Embedded sweeping spectrum analyzer demo based upon fosphor
  • Pending on FPGA FFT block

• Si5338 MIMO/Expansion clock settings
• Create impulse latency RTT mode for FPGA