x32_compareGreater - dspsandbox/Canvas GitHub Wiki
images/DSP-modules/x32_compareGreater.png
Description
Logic COMPARE GREATER gate.
Ports
| Name | Direction | Width | Comment |
|---|---|---|---|
| in0 | Rx | 32 bit | |
| in1 | Rx | 32 bit | |
| out | Tx | 1 bit | out=1 IF in0>in1 out=0 OTHERWISE |
Pipeline latency (clk @ 125 MHz)
1 clk cycle.