x1_sampleHold - dspsandbox/Canvas GitHub Wiki
images/DSP-modules/x1_sampleHold.png
Description
SAMPLE and HOLD. In sampling mode (hold=0), the input port is continuously sampled and forwarded to the output port. In hold mode (hold=1) the sampling stops and the output stays at the last sampled value.
Ports
| Name | Direction | Width | Comment |
|---|---|---|---|
| in | Rx | 1 bit | |
| hold | Rx | 1 bit | SAMPLE IF hold==0 HOLD IF hold==0 |
| out | Tx | 1 bit |
Pipeline latency (clk @ 125 MHz)
2-256 clk cycles.