x1_in(i) - dspsandbox/Canvas GitHub Wiki
Description
Digital INPUT (see Pinout).
Ports
| Name | Direction | Width | Comment |
|---|---|---|---|
| In(i) | Tx | 1 bit | Out(i)=1 IF LOGIC_HIGH Out(i)=0 IF LOGIC_LOW |
VHDL
Part of DSP_core.vhd. Input is synchronized at sync.vhd.
Digital INPUT (see Pinout).
| Name | Direction | Width | Comment |
|---|---|---|---|
| In(i) | Tx | 1 bit | Out(i)=1 IF LOGIC_HIGH Out(i)=0 IF LOGIC_LOW |
Part of DSP_core.vhd. Input is synchronized at sync.vhd.