RF signal scaling - dspsandbox/Canvas GitHub Wiki

Introduction

Amplification, attenuation and control of the RF offset are three of the most common RF scaling transformations. These are often achieved through simple operation amplifier circuits, where the particular amplification, attenuation or offset are typically defined by the resistors used in the design.

In this example we present a simple DSPsandbox-Cavas project that performs RF scaling between the RF input and outputs of your Redpitaya board. The different scaling parameters are adjustable during operation through the Python GUI.

NOTE: This document assumes that the user has some prior experience in using DSPsandbox-Canvas. If this is not the case, please have a look at My first DSP design.

Building the scaling design

A documentation of all the available DPS modules is available here. The modules used in this design are:

• ADC[32]
• DAC[32]
• add[32]
• mult[32]
• shiftL[32]
• const[1]
• const[32] images/RF-signal-scaling/scaling.PNG

Requesting NET/VHDL and SYNTH/IMPL

Once the design is completed, we use the Python GUI (_SERVER _tag) in order to convert your design into a synthesizable VHDL and request its synthesis/implementation on a remote server.

Configuring the x1/x32 constants

We configure the x1 and x32 constants under the FPGA tag.

x1 const

x32 const

The output signals are (in units of V):

• out1 = 0.1 + 0.314 * in1
• out2 = -0.1 - 3 * in2

Note that for out2 we have used a combination of mult[32] and shiftL[32] to achieve a scaling factor greater than 1.

Final remark

The design is ready to go! It can be automatically deployed after boot by selecting the Auto load after PS boot option within your Python GUI. This option is particularly suited for long-term implementation (bitstream and constants are automatically reloaded after a power failure).