RoachLayoutNotes - david-macmahon/wiki_convert_test GitHub Wiki
Review Notes
| No | Description | Resolution | Status |
|---|---|---|---|
| 1 | CKE2 unconnected | Not Required | Closed |
| 2 | Need to add resistors to power supply sense lines in order to control connection points properly | Done | Closed |
| 3 | FPGA IO optimization for layout | Done | Closed |
| 4 | QDR2_BY0_1_K_P/N and QDR2_BY2_3_K_P/N require termination | Corrected | Closed |
| 5 | QVLD pins are outputs from QDR memory and should not be terminated - disagreement between data sheet and simulation model | Samsung confirmed error in model | Closed |
| 6 | DDR_CLKOUT and DDR_CLKOUT# not routed differentially | Is OK | Closed |
Schematic Review Issues and Notes
Gerber Review March 4, 2008 @ BWRC (HC, JM, DW)
- Strange connectivity in gerber view (ie., Z-DOK 3.3V pins)
- Increase trace widths for Z-DOK power supply pins
- Inconsistent thermal relief on ATX power connector pins
- Recommend using ATX5V for some power regulation RESOLVED
- Extend 5V_ATX island into regulators zone on 1V plane?
- 12V input to U50 goes through thin neck; move C419 to bottom side?
- Cape Town on Silkscreen 2 words DONE
- Specify 10% tolerance for impedance control in readme DONE
- Trace length matching wiggles too dense; too much crosstalk?
- Move drill table legend outside board outline
- High-speed signals going over plane splits
- Add decoupling capacitors between planes or from each to ground?