KatADC - david-macmahon/wiki_convert_test GitHub Wiki

KatADC_V12.jpg

Also known as

KAT-7 ADC / Ratty ADC

Specifications

  • Inputs
    • Clock: 1.5GHz (Max) 50Ohm 1dBm
    • Signal: Single-ended
    • Sync: LVTTL, 5V tolerant (SN65LVDS1)
  • Outputs
    • 1x Tyco Z-DOK+ 40 differential pair connector
      • 4x 8-bit offset binary data @ DDR
      • 1x digital clock to CASPER standard Z-DOK clock pins
  • Control/Configuration
    • ADC: 3-wire Serial
    • RF Front-end: I2C
  • RF Front-End (for each channel)
    • 20dB Gain Block (50.0MHz - 850.0MHz)
    • 0dB to 31.5dB Variable Attenuator (controllable in 0.5dB steps)
    • Non-reflective 50ohm RF switch to disconnect input
    • Provision for a fixed attenuator (LAT-series)
  • Printed Circuit Board
    • Stack Up
      • 6-layers
    • Thickness
      • 2.4mm
    • Material
      • Rogers RO4003
      • FR-4
      • 7628 Prepreg
    • Insertion Loss
      • < 1.5dB/m
    • Z Variation (50Ω nom.)
      • < ±1%
  • Miscellaneous
    • 2x Temperature Sensors
      • ADC Internal
      • Ambient
    • 256 x 8-bit EEPROM
    • Provision for EMI/RFI Shielding (for each channel)

Versions

  • V1.0 - Superseded
    • Prototype
  • V1.1 - Superseded
    • Improved PSU Design to reduce heat generation
  • V1.2 - Superseded
    • Changed to a different CAD system and incremented the version number
    • Functionally identical to V1.1

High Frequency Amplifier Upgrade

The 20dB amplifier [(SBB-2089Z: 50.0MHz

Refer to the datasheets of the amplifiers for a performance comparison over their respective frequency ranges.

Heatsink/RFI Shield