DRAM_Notes - david-macmahon/wiki_convert_test GitHub Wiki

Full Burst (Half Burst Off) Mode, 144-bit wide bus

• Each burst takes two clocks and reads/writes 288 bits.
• The address should look like this:

Bit Number: Read vertically 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 0 0 a a a a a a a a a a a a a a a a a a a a a a a a a 0 0 0 0 0

• Thus there are 30 significant bits (to represent the 2^30 = 1 GB of memory)
• The lowest five bits should be fixed to zero since each read or write burst involves (ignoring the 9th parity chip):

8 bytes wide data path * 2 for DDR * 2 since each burst involves two DDR transactions = 2^5

• • (If you need to address the memory not aligned to 2^5 locations, this seems to be possible, but I did not use this for my application)

• The 25 "a's" represent the address bits that should change as needed.

• Writing a burst requires cmd_valid to be true for two consecutive clocks, during which the 288 bits of data are presented, 144 bits at a time. The address shouldn't change during these two clocks.

• Reading a burst requires cmd_valid to be true for just one clock. I'm not sure it's necessary, but to be safe, I keep the address constant for the cmd_valid clock and the next clock cycle. data_valid will go high for two consecutive cycles when the data is ready.

• cmd_ack is asserted in the same clock as cmd_valid. Thus ~(cmd_ack & cmd_valid) is equivalent to cmd_noack.