Cmult_4bit_sl - david-macmahon/wiki_convert_test GitHub Wiki
Block: Complex 4-bit Multiplier Implemented in Slices
(cmult_4bit_sl)
Block Author: Aaron Parsons
Document Author: Vinayak Nagpal
Summary
Perform a complex multiplication ((a+bi)(c-di)=(ac-bd)+(ad+bc)i). Implements the logic in Slices.
Mask Parameters
| Parameter | Variable | Description |
|---|---|---|
| Multiplier Latency | mult_latency | The latency through a multiplier. |
| Add Latency | add_latency | The latency through an adder. |
Ports
| Port | Dir | Data Type | Description |
|---|---|---|---|
| a | in | Inherited | The real component of input 1. |
| b | in | Inherited | The imaginary component of input 1. |
| c | in | Inherited | The real component of input 2. |
| d | in | Inherited | The imaginary component of input 2. |
| real | out | Inherited | ac-bd |
| imag | out | Inherited | ad+bc |
Description
Perform a complex multiplication ((a+bi)(c-di)=(ac-bd)+(ad+bc)i). Implements the logic in Slices.