ADC1X2200 10 - david-macmahon/wiki_convert_test GitHub Wiki

Also known as

MeerKAT L-Band & UHF-Band ADC / Ratty2 ADC

Specifications

• ADC
  • 1x e2v Semiconductors Single 10-bit 2.2GSPS AT84AS008 ADC & AT84CS001 DMUX

• Inputs
  • Clock: 2.2GHz (Max), 50Ohm Single-ended, 0dBm (nominal)
  • Signal: 3.3GHz (FPBW), 50Ohm Single-ended
  • Sync: LVTTL, 5V tolerant (SN65LVDS1)

• Outputs
  • 1x Tyco Z-DOK+ 40 differential pair connector
    • 2x 10-bit offset binary data & out-of-range bit @ DDR
    • 1x digital clock to CASPER standard Z-DOK clock pins

• Control/Configuration
  • ADC
    • Checker board pattern generator (on-board jumper)
    • Data output format: Binary/Gray (resistor selectable)
  • DMUX
    • Asynchronous reset (digital signal via Z-DOK+)
    • Built-in self test (digital signal via Z-DOK+)

• Printed Circuit Board
  • Stack Up
    • 6-layers
  • Thickness
    • 2.4mm
  • Material
    • FR-4
      • Signal layers (top & bottom): 0.5oz copper
      • Power planes (4 internal): 1.0oz copper
    • Prepreg: 1080 & 7628

• Miscellaneous
  • 2x Temperature Sensors (via I2C)
    • ADC Internal
    • Ambient
  • 256 x 8-bit EEPROM (via I2C)

Versions

• V1.0 - Superseded
  • Prototype

• V1.1 - Production Version
  • Fixed error in PSU component footprint
  • Functionally identical to V1.0
  • Block Diagram (PNG)
  • Schematics (PDF)
  • PCB Manufacturing Data (ZIP)
  • Altium Design Files (ZIP)
  • Bill Of Materials - BOM (PDF)
    • Note: Resistor R7 sets the ADC output data format, which is also set in the CASPER toolflow. The ADC output data format selection in the CASPER toolflow and the specific hardware build must match.
      • Binary Encoding: R7 - Do Not Populate (Default option in BOM)
      • Gray Encoding: R7 - 0R

Heatsink

• The ADC requires this heatsink (or a similar heatsink) for normal operation.
• Manufacturing File (STEP) - CHANGE THE FILENAME EXTENSION TO .STP ONCE DOWNLOADED
• Manufacturing Drawing (PDF)

Measured Performance

• Frequency Response
  • Analogue Input Bandwidth
    • 50MHz - 3.5GHz (in 50MHz steps)
  • Clock Input
    • Sampling Frequency: 1.712GHz
    • Input Power: -1.0dBm
  • http://casper.berkeley.edu/wiki/images/1/15/ADC1X2200-10_freq_resp.PNG

• Measured Performance Parameters
  • BW = 900MHz - 1750MHz
  • fs = 1.712GHz
  • SFDR = >40dB
  • SNR = >38dB
  • ENOB = >6

• VSWR
  • Analog Input: <1.65:1
    • Sweep Frequency: 50MHz - 3.5GHz
    • Input Power: 0dBm
    • http://casper.berkeley.edu/wiki/images/d/d9/Swr_in.png
  • Clock Input
    • Sweep Frequency: 200MHz - 2.2GHz
    • Input Power: 0dBm
    • http://casper.berkeley.edu/wiki/images/a/a0/Swr_clk.png