Memory Map - cr88192/bgbtech_shxemu GitHub Wiki

SH-2

SH-2 Memory Map:

  • 0000_0000..0000_FFFF: SRAM
  • 0080_0000..00FF_FFFF: VRAM
  • 1000_0000..17FF_FFFF: DRAM
  • ABCD_0000..ABCD_FFFF: MMIO (Memory Mapped IO, UART/GPIO)
  • FF00_0000..FF00_FFFF: MMREG (Memory Mapped Registers)
SH-2 always uses a physical memory map.

Canonically, the SH-2 has a 29 bit (repeating) address space, but this emulator currently uses a 32-bit space. Could address this, but the currently used code doesn't seem to notice.

SH-4

The SH-4 uses 29 bit physical addressing.

As a result, the same region of memory may be accessed via multiple addresses with (theoretically) different properties.

  • Because this is emulated though, there isn't much real effect here ATM, it will simply mask off the address.
  • 0000_0000..1FFF_FFFF: Physical Address Space
  • 2000_0000..3FFF_FFFF: Physical Address Space (Repeated)
  • ...
Memory Map (SH-4, Physical):
  • 0000_0000..003F_FFFF: Boot ROM
  • 005F_8000..005F_8FFF: GFX/GPU Registers
  • 007F_0000..007F_7FFF: Emu DSP RAM (Left/Right Channel)
  • 007F_8000..007F_9FFF: Emu DSP Regs
  • 0080_0000..00FF_FFFF: Emu Framebuffer/Console
  • 0500_0000..05FF_FFFF: GFX/GPU VRAM (Graphics Chipset / GPU)
  • 0BCD_0000..0BCD_FFFF: MMIO ('BCD' Memory Mapped IO, UART/GPIO)
  • 0C00_0000..0FFF_FFFF: DRAM A (64MB)
  • 1000_0000..17FF_FFFF: DRAM B (128MB)
  • 1800_0000..1EFF_FFFF: DRAM C (112MB, Opt)
  • 1F00_0000..1FFF_FFFF: MMREG (Memory Mapped Registers)
  • FF00_0000..FFFF_FFFF: MMREG (Memory Mapped Registers)
Memory Map (SH-4, Logical):
  • 0000_0000..7FFF_FFFF: User Memory, Uses MMU
  • 8000_0000..9FFF_FFFF: Privledged, Physical
  • A000_0000..BFFF_FFFF: Privledged, Physical, No-Cache
  • C000_0000..DFFF_FFFF: Privledged, Uses MMU
  • E000_0000..FFFF_FFFF: Privledged, Used internally by CPU
    • This block is special in that features may be accessed here that are unreachable in the other areas.
    • Caches may be accessed via this area, but may not necessarily contain valid information.
Emulator VRAM (Accessed as DWord values, Relative):
  • 00_0000 .. FE_FFFF: Framebuffer
  • FF_0000 .. FF_7FFF: Console Buffer
  • FF_8000 .. FF_03FF: Registers
There is a secondary VRAM region for the emulated graphics chipset and GPU ( Video Registers ).

BCD MMIO (Accessed as DWord values, Relative):

  • 0000: GPIO Control
  • 0004: GPIO Data
  • ..
  • 0040: SPI Control
  • 0044: SPI Data
  • ..
  • 0100: UART Rx (Reads from console)
  • 0104: UART Tx (Writes to console)
  • 0108: UART Status (Gives UART status)
  • 010C: UART Ctrl (Controls UART)
⚠️ **GitHub.com Fallback** ⚠️