Peripherals - beagleboard/pocketbeagle GitHub Wiki

Introduction

This page covers some aspects of setting up some peripherals for use on the default Debian images.

TO-DO: Add some of the more standard stuff here for completeness. All GPIO would be too much, but maybe we could put a big table at the end.

Table of Contents

UART

  • ttyS0 (getty console by default)

  • ttyS1 P2_09 = uart1_txd, P2_11 = uart1_rxd

config-pin P2_09 uart
config-pin P2_11 uart

PWM

  • ehrpwm0A: P1_08 & P1_36 (shared)
config-pin P1_08 pwm
#or
config-pin P1_36 pwm

export ocp=/sys/devices/platform/ocp
echo 0 > ${ocp}/48300000.epwmss/48300200.pwm/pwm/pwmchip*/export
echo 20000 > ${ocp}/48300000.epwmss/48300200.pwm/pwm/pwmchip*/pwm0/period
echo 10000 > ${ocp}/48300000.epwmss/48300200.pwm/pwm/pwmchip*/pwm0/duty_cycle
echo 1 > ${ocp}/48300000.epwmss/48300200.pwm/pwm/pwmchip*/pwm0/enable
  • ehrpwm0B: P1_10 or P1_33 (shared)
config-pin P1_10 pwm
#or
config-pin P1_33 pwm

export ocp=/sys/devices/platform/ocp
echo 1 > ${ocp}/48300000.epwmss/48300200.pwm/pwm/pwmchip*/export
echo 20000 > ${ocp}/48300000.epwmss/48300200.pwm/pwm/pwmchip*/pwm1/period
echo 10000 > /${ocp}/48300000.epwmss/48300200.pwm/pwm/pwmchip*/pwm1/duty_cycle
echo 1 > ${ocp}/48300000.epwmss/48300200.pwm/pwm/pwmchip*/pwm1/enable
  • ehrpwm1A: P2_01
config-pin P2_01 pwm

export ocp=/sys/devices/platform/ocp
echo 0 > ${ocp}/48302000.epwmss/48302200.pwm/pwm/pwmchip*/export
echo 20000 > ${ocp}/48302000.epwmss/48302200.pwm/pwm/pwmchip*/pwm0/period
echo 10000 > ${ocp}/48302000.epwmss/48302200.pwm/pwm/pwmchip*/pwm0/duty_cycle
echo 1 > ${ocp}/48302000.epwmss/48302200.pwm/pwm/pwmchip*/pwm0/enable
  • ehrpwm2B: P2_03
config-pin P2_03 pwm

export ocp=/sys/devices/platform/ocp
echo 1 > ${ocp}/48304000.epwmss/48304200.pwm/pwm/pwmchip*/export
echo 20000 > ${ocp}/48304000.epwmss/48304200.pwm/pwm/pwmchip*/pwm1/period
echo 10000 > ${ocp}/48304000.epwmss/48304200.pwm/pwm/pwmchip*/pwm1/duty_cycle
echo 1 > ${ocp}/48304000.epwmss/48304200.pwm/pwm/pwmchip*/pwm1/enable

CAN

Only specific pin pairings are supported. Please use one of the pairings below.

A CAN PHY is required to go from the TX/RX lines to CAN-H/CAN-L used on a physical CAN bus. This setup uses the controller built into the AM335x SoC. Using the on-board PHY provides cost and performance advantages over using an external CAN controller, such as one you'd connect over a SPI bus.

  • dcan0:
config-pin P1_28 can    # rx
config-pin P1_26 can    # tx
#or
config-pin P1_30 can    # rx
config-pin P1_32 can    # tx
  • dcan1:
config-pin P2_09 can    # rx
config-pin P2_11 can    # tx
#or
config-pin P2_25 can    # rx
config-pin P2_27 can    # tx