Clock Sync.

For LMK04828, make N=1 at PLL1. i.e. 10MHz external input, the PLL locking freq. has to be 10MHz. That will make the phase consistent no matters power cycling. Reference clock file = 20251107.

* LMX 2594

* Multi-chip sync TI LMK

• Refer to LMX2594 datasheet, check on the block diagram.

• Clock input to LMX 2594 is a reference clock. It has it own VCO to generate the desired frequency up to 15GHz.