Texas Instruments ICSS - acontis/atemsys GitHub Wiki
This page covers the link layer ICSS from TI. The link layer is built into the AM335x, AM437x and AM57xx SoC families, among others.
The acontis internal name for this link layer is emllICSS
In the following SDK sub-directory you find all device tree source files .dts and compiled versions .dtb:
/board-support/linux-rt-4.9.59+gitAUTOINC+273202a0d3-g273202a0d3/arch/arm/boot/dts
am572x-pru-uio.dtsi
uio_pruss2_evt2: uio_pruss2_evt2 {
compatible = "ti,uio-module-drv";
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
interrupt-mode = <1>;
status = "disabled"; //status = "okay";
};
uio_pruss2_evt3: uio_pruss2_evt3 {
compatible = "ti,uio-module-drv";
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>
interrupt-mode = <1>;
status = "disabled"; //status = "okay";
};
Add to the end:
// acontis changes
&pruss_soc_bus1 {
status = "disabled";
};
&pruss2_eth {
compatible = "acontis,device";
status="disabled";
interrupt-parent = <&crossbar_mpu>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
};
❗ If the TTS Feature isn't used, skip disabling the interrupts in the UIO and all interrupt properties below.
Keep only status=disabled for the &pruss_soc_bus1 and &pruss2_eth nodes for the sake of simplicity. These interrupt properties instruct Linux to forward TTS interrupts from PRUSS via CrossbarIRQ controller to GIC.
There are two additional ETH sections on the AM571x, therefore &pruss1_eth must also be deactivated.
PRU ICSS Link Layer can optionally use Time-Triggered Send feature.
uio_pruss2_evt0: uio_pruss2_evt0 {
compatible = "ti,uio-module-drv";
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
interrupt-mode = <1>;
status = "disabled"; // status = "okay";
};
uio_pruss2_evt1: uio_pruss2_evt1 {
compatible = "ti,uio-module-drv";
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
interrupt-mode = <1>;
status = "disabled"; // status = "okay";
};
Additional interrupts required
&pruss2_eth {
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx_1", "tx_2", "tx_3", "tx_4", "rx_1", "rx_2", "rx_3", "rx_4";
};
Expand the &pruss2_eth node
&pruss2_eth {
compatible = "atemsys", "acontis,device";
atemsys-Ident = "ICSS";
status = "okay";
interrupt-parent = <&crossbar_mpu>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx_1", "tx_2", "tx_3", "tx_4", "rx_1", "rx_2", "rx_3", "rx_4";
pruss2_emac0: ethernet-mii0 {
compatible = "atemsys";
atemsys-Ident = "ICSS";
atemsys-Instance = <0x3>;
status = "okay";
phy-handle = <&pruss2_eth0_phy_atemsys>;
pruss2_eth0_phy_atemsys: ethernet-phy@0 {
reg = <0>;
};
};
pruss2_emac1: ethernet-mii1 {
compatible = "atemsys";
atemsys-Ident = "ICSS";
atemsys-Instance = <0x4>;
status = "okay";
phy-handle = <&pruss2_eth1_phy_atemsys>;
pruss2_eth1_phy_atemsys: ethernet-phy@1 {
reg = <1>;
};
};
};
Add the following to the end of file am335x-pru-uio.dtsi
// acontis changes
&gpio2 {
status = "disabled";
};
&gpio3 {
status = "disabled";
compatible = "acontis,device";
interrupt-parent = <&intc>;
interrupts = <22>, <23>;
};
&gpio0 {
pinctrl-0 = <&pruss_mdio_default>
pinctrl-names = "default";
status = "okay";
};
&gpio1 {
pinctrl-0 = <&pruss_eth_default>;
pinctrl-names = "default";
status = "okay";
};
-
gpio2andgpio3controllers are disabled, because they are accessed directly from the link layer. -
gpio3interrupt properties are used by atemsys to configure TTS. -
gpio0andgpio1are used to configure pin muxing for MDIO and MAC.