Digital Design - ZishanManna/interview-prep-wiki GitHub Wiki

A full adder is a combinational circuit that adds three bits: two significant bits and a carry bit from a previous addition. It produces a sum and a carry output. The logic for a full adder can be expressed using the following equations:

• Sum = A ⊕ B ⊕ Cin
• Cout = (A & B) | (Cin & (A ⊕ B))

A D flip-flop (Data or Delay flip-flop) is a type of sequential circuit that captures the value of the input data (D) at a particular clock edge and holds it until the next clock edge. On the rising edge of the clock, the output Q takes the value of D and remains in this state until the next clock edge.

A 4-to-1 multiplexer (MUX) is a combinational circuit that selects one of the four input signals based on the values of two select lines and forwards the selected input to a single output line. The selection can be expressed as:

• Y = I0 if S1S0 = 00
• Y = I1 if S1S0 = 01
• Y = I2 if S1S0 = 10
• Y = I3 if S1S0 = 11

A ripple carry adder is a type of digital adder that calculates the sum of two binary numbers. It consists of multiple full adders connected in series, where the carry output from one full adder is connected to the carry input of the next full adder.

Clock skew refers to the difference in arrival times of the clock signal at different components in a digital circuit. This can occur due to variations in clock distribution paths and may lead to setup time violations and potential functional failures.

A shift register is a sequential circuit that allows the storage and movement of data bits in a specified direction (left or right). It is composed of multiple flip-flops connected in series. On each clock pulse, the bits are shifted to the next flip-flop in the designated direction.

A binary decoder is a combinational circuit that converts binary inputs into unique outputs. It activates one output line corresponding to the binary value of the inputs. For example, a 2-to-4 decoder will have two inputs and four outputs, where only one output is activated based on the input binary value.

A parity generator is a combinational circuit that produces a parity bit (even or odd) based on the input data bits. It adds an extra bit to ensure that the total number of 1's in the output is even (even parity) or odd (odd parity).

• Synchronous Counter: All flip-flops are triggered by the same clock signal simultaneously. The state of the counter changes in sync with the clock edge.

• Asynchronous Counter: Flip-flops are triggered by the output of the preceding flip-flop. The state changes ripple through the flip-flops, leading to potential timing issues.

A Johnson counter is a type of shift register where the inverted output of the last flip-flop is fed back to the input of the first flip-flop. It generates a sequence of states that is twice the length of the number of flip-flops used in the circuit. For example, a 3-bit Johnson counter will have a total of 6 unique states.

• Combinational Circuits: The output depends solely on the current inputs. There is no memory element involved, meaning the output changes instantly with input changes (e.g., multiplexers, adders).

• Sequential Circuits: The output depends on the current inputs and the past states (memory). These circuits use storage elements like flip-flops to hold state information (e.g., counters, registers).

A 3-bit binary counter is a sequential circuit that counts in binary from 0 to 7 (000 to 111). It typically uses flip-flops and toggles the output on each clock pulse. The counting sequence is as follows: 000 → 001 → 010 → 011 → 100 → 101 → 110 → 111 → 000.

• Multiplexer (MUX): A device that selects one of several input signals and forwards the selected input to a single output line. It uses select lines to choose which input to forward.

• Demultiplexer (DEMUX): A device that takes a single input signal and channels it to one of many output lines based on select lines. It essentially performs the reverse function of a multiplexer.

A binary adder-subtractor is a combinational circuit that can perform both addition and subtraction of binary numbers. It typically uses an adder circuit and a control signal to determine whether to add or subtract. Subtraction is performed using the two's complement method.

A race condition occurs in a digital circuit when the output depends on the sequence or timing of uncontrollable events. This can happen in sequential circuits where the final state can vary based on the timing of inputs or clock edges, leading to unpredictable behavior and potential functional failures.

A clock divider is a circuit that reduces the frequency of an input clock signal to produce a lower frequency output. It is commonly used to generate clock signals for different parts of a digital system that operate at varying frequencies.

A flip-flop is a bistable device that can store one bit of data. It has two stable states and can be used to store information, synchronize signals, or create memory elements in sequential circuits. Common types include D flip-flops, JK flip-flops, and T flip-flops.

• Setup Time: The minimum amount of time before the clock edge that the input data must be stable to ensure it is correctly sampled by the flip-flop.

• Hold Time: The minimum amount of time after the clock edge that the input data must remain stable to ensure that the flip-flop correctly captures the data.

A finite state machine (FSM) is a model of computation that consists of a finite number of states, transitions between those states, and actions. It operates based on input signals and moves from one state to another according to defined rules. FSMs can be classified as Mealy or Moore machines, depending on how outputs are generated.

Metastability is a condition in digital circuits where a flip-flop or latch cannot settle into a stable state after being driven by inputs that change near the clock edge. This can lead to unpredictable outputs and may cause timing violations in synchronous circuits. Proper design techniques, such as using synchronizers and ensuring adequate setup and hold times, can mitigate these effects.

A state machine is a model used to design digital logic circuits that can be in one of a finite number of states at any time. It transitions between states based on inputs and current states, enabling complex behaviors in systems like controllers and communication protocols.

• Mealy State Machine: The outputs depend on both the current state and the current inputs. This can lead to faster output changes since they can change in response to input changes without waiting for a clock edge.

• Moore State Machine: The outputs depend only on the current state. This generally makes the design simpler and more predictable, as outputs change only on state transitions.

A data bus is a communication system that transfers data between components of a computer or digital system. It consists of a set of parallel wires (or lines) that can carry multiple bits simultaneously. Buses facilitate communication between the CPU, memory, and peripherals.

A latch is a level-sensitive storage device that can hold a value as long as the enable signal is active. It is transparent, meaning its output changes when the enable signal is asserted. In contrast, a flip-flop is edge-triggered, changing its output only on specific clock edges.

An arithmetic logic unit (ALU) is a digital circuit used to perform arithmetic and logic operations on binary numbers. It can perform operations such as addition, subtraction, AND, OR, and NOT, and is a fundamental component of the CPU in computer systems.

Signal propagation delay is the time it takes for a signal to travel from one point to another in a digital circuit. This delay can affect the performance and timing of circuits, especially in high-speed designs, and can lead to timing violations if not properly managed.

A register is a small amount of storage available within a digital circuit, typically composed of flip-flops. Registers are used to hold data temporarily for processing, facilitate data transfer between circuits, and maintain state information in sequential designs.

Combinational logic is a type of digital logic circuit where the output is a direct function of the current inputs, with no memory elements involved. Examples include adders, subtractors, multiplexers, and decoders.

Timing diagrams are graphical representations of the states of signals in a digital circuit over time. They illustrate how signals change in relation to clock edges and other signals, helping designers understand the behavior and timing relationships within a circuit.

A comparator is a digital circuit that compares two binary numbers and determines their relative magnitudes. It produces outputs indicating whether one number is greater than, less than, or equal to the other. Comparators are commonly used in arithmetic operations and decision-making circuits.