VSWR in LTspice - WCP52/docs GitHub Wiki

For an introduction on VSWR, see Microwaves101.

Measuring the VSWR of our input frontend circuit can give an indication of how much reflected power from each input will affect the behavior of the DUT. It's not always useful or meaningful to measure VSWR in a SPICE simulator like LTspice, because it's so often layout dependent - but in specific cases like characterizing our input frontend design, it can be useful. Our input frontend circuit had full parasitics specified for all devices, reducing most VSWR error to impedance mismatch in the connections and on-board transmission lines.

VSWR can be calculated from a complex impedance; the first step is to get the complex impedance. That's easy: just divide the input voltage by the input current; both of these are complex when performing AC analysis.

The next step is to compute the reflection coefficient. This is the amplitude of a reflection, relative to the amplitude of the original wave before it was reflected. The reflection coefficient of an impedance continuity can be computed like this:

Where Z is the actual complex impedance as seen as the input, and Z₀ is the characteristic impedance of the system. The characteristic impedance of our system is specified to be 50 ohms.

Once the reflection coefficient has been computed, the VSWR can be computed from it:

In LTspice, these two functions (reflection coefficient and VSWR) can be added as plot functions, by adding the following definitions in the plot definitions file:

.func RefCoeff(z,z0) {(z-z0)/(z+z0)}
.func VSWR(rc) {(1+abs(rc))/(1-abs(rc))}

Now, given an input source V1 and an input voltage (after the source termination) input, the VSWR can be plotted as

VSWR(RefCoeff(-V(input)/I(V1), 50))

Negating the impedance accounts for the fact that I(V1) is the current into the source, not the current out of the source.