Xilinx Tri mode Ethernet Mac Example Design - Terry4055/FPGA_HW GitHub Wiki
- ๊ตฌ์ฑ
- Data Generator <--Axi-stream--> FIFO <--Axi-stream--> Tri-mode Ethernet MAC IP <--RGMII--> Ethernet Trasceiver <--MDI 1000 Base-T--> RJ45 Connector
- ์ค์ ๋ด์ฉ
- RGMII(Reduced Gigabit Media Independent Interface) : GMII์ ๋นํด Pin Count๊ฐ 50%๋ก ์ค์ด๋ DDR Flip Flop ๋ฐฉ์ ์ธํฐํ์ด์ค
- Tri-mode Ethernet MAP IP
- 10/100/1000 Mb/s Ethernet MAC, 10/1000Mb/s Ethernet MAC, 1Gb/s Ethernet MAC, 2.5Gb/s Ethernet MAC ์ง์
- ๋ฐ์ด์ค, ์ ์ด์ค ๋์ ์ง์
- 2๊ฐ Main Physical Standards
- BASE-T : twisted pair cabling system์ ์ฌ์ฉํ copper standard(SGMII, RGMII, MII, GMII with 10/100/1000bps)
- BASE-X : short & long ํ์ฅ ๋ ์ด์ ๋ฅผ ์ฌ์ฉํ Fiber optical physical standard(PCS/PMA or SGMII with 1G/2.5Gbps)
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