参考芯片代码(USART3(PC10\PC11)、外部8M晶振、168MHz主频)
126行：
void tm_initrcc(void)
{
    uint32_t data;

    /* Enable HSE */
    RCC->CR |=  RCC_CR_HSEON;

    /* Test if HSE is ready */
    while( (RCC->CR & RCC_CR_HSERDY) == 0u ){
        ;
    }

    /* Set HCLK=SYSCLK,PCLK2=HCLK/2,PCLK1=HCLK/4 */
    RCC->CFGR = (RCC->CFGR & ~(RCC_CFGR_HPRE)) | RCC_CFGR_HPRE_DIV1;
    RCC->CFGR = (RCC->CFGR & ~(RCC_CFGR_PPRE2)) | RCC_CFGR_PPRE2_DIV2;
    RCC->CFGR = (RCC->CFGR & ~(RCC_CFGR_PPRE1)) | RCC_CFGR_PPRE1_DIV4;


    /* Set HSE as PLL source,and Enable PLL, P=2,M=8/25,N=336 */
    RCC->PLLCFGR &= ( (~RCC_PLLCFGR_PLLSRC) & (~RCC_PLLCFGR_PLLP) & \
              (~RCC_PLLCFGR_PLLN)&(~RCC_PLLCFGR_PLLM) );
    RCC->PLLCFGR |= ( RCC_PLLCFGR_PLLSRC_HSE | \
            RCC_PLLCFGR_PLLN_4 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_8 | \
            (HSE_VALUE/1000000u) );

    RCC->CR |= RCC_CR_PLLON;

    /* Test if PLL is ready */
    while( (RCC->CR & RCC_CR_PLLRDY) == 0u ){
        ;
    }

    /* Switch pll as system clock */
    data = ( RCC->CFGR & (~RCC_CFGR_SW )) | RCC_CFGR_SW_PLL;
    RCC->CFGR = data;

    /* Test if pll switch successfully */
    while( (RCC->CFGR & RCC_CFGR_SWS_PLL) == 0u ){
        ;
    }

    return;
}

192行：
static void tm_inituart(void)
{
    uint32_t data;

    /* GPIOC clock enable */
    RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;

    /* USART3 clock enable */
    RCC->APB1ENR |= RCC_APB1ENR_USART3EN;

    /* set PC10/PC11 to Alternate function for USART3 transmit/receive */
    data = GPIOC->MODER;
    data &= (~GPIO_MODER_MODER10);
    data |= ( GPIO_MODER_MODER10_1 );
    GPIOC->MODER = data;

    data = GPIOC->OTYPER;
    data &= ( ~(GPIO_OTYPER_OT_10) );
    GPIOC->OTYPER = data;

    data = GPIOC->PUPDR;
    data &= ( ~(GPIO_PUPDR_PUPDR10) );
    data |= (GPIO_PUPDR_PUPDR10_0 );
    GPIOC->PUPDR = data;

    data = GPIOC->OSPEEDR;
    data &= ( ~(GPIO_OSPEEDER_OSPEEDR10) );
    data |= ( GPIO_OSPEEDER_OSPEEDR10_1 );
    GPIOC->OSPEEDR = data;

    data = GPIOC->AFR[1];
    data &= ( ~( GPIO_AFR_MASK<
    data |= ( GPIO_AFR_AF7<
    GPIOC->AFR[1] = data;

    data = GPIOC->MODER;
    data &= (~GPIO_MODER_MODER11);
    data |= ( GPIO_MODER_MODER11_1 );
    GPIOC->MODER = data;

    data = GPIOC->PUPDR;
    data &= ( ~(GPIO_PUPDR_PUPDR11) );
    data |= (GPIO_PUPDR_PUPDR11_0 );
    GPIOC->PUPDR = data;

    data = GPIOC->OSPEEDR;
    data &= ( ~(GPIO_OSPEEDER_OSPEEDR11) );
    data |= ( GPIO_OSPEEDER_OSPEEDR11_1 );
    GPIOC->OSPEEDR = data;

    data = GPIOC->AFR[1];
    data &= ( ~( GPIO_AFR_MASK<
    data |= ( GPIO_AFR_AF7<
    GPIOC->AFR[1] = data;

    /* Disable USART and TX and RX */
    USART3->CR1 &= 0xdff3u;

    /* Clear STOP bit,CLKEN,CPOL,CPHA */
    USART3->CR2 &= 0x8060u;

    /* Set 8bit,non parity,no interupt */
    USART3->CR1 &= 0xe80Fu;

    /* Disable CTS and DMA */
    USART3->CR3 &= 0xf800u;

    /* Set baud=115200bps */
    USART3->BRR = 0x016cu;

    /* Enable receiver and transmitter and USART */
    USART3->CR1 |= 0x200cu;

    return;
}

295行：
void tm_senduart(uint8_t c)
{
    /* Wait for the transmitter to be ready while */
    while( (USART3->SR & USART_SR_TXE) == 0u){
        ;
    }

    /* Send character */
    USART3->DR = c;

    /* Wait for the transmitter to be ready while */
    while( (USART3->SR & USART_SR_TXE) == 0u){
            ;
    }

    return;
}

321行：
uint8_t tm_recvuart(void)
{
    uint8_t c;

    /* Wait for the receiver to be ready while */
    while( ((USART3->SR) & USART_SR_RXNE) == 0u){
         ;
    }

    c = (uint8_t)USART3->DR;

    return c;
}

移植芯片代码(USART2(PA2\PA3)、内部16M晶振、84MHz主频)
126行：                                                        /* 说明：HSE更改为HSI，M从8更改为16，N从336更改为168，同时修改了一些代码的风格 */
void tm_initrcc(void)
{
    /* Enable HSI */
    RCC->CR |=  RCC_CR_HSION;

    /* Test if HSI is ready */
    while( (RCC->CR & RCC_CR_HSIRDY) == 0u ){
        ;
    }

    /* Set HCLK=SYSCLK,PCLK2=HCLK,PCLK1=HCLK/2 */
    RCC->CFGR &= (~RCC_CFGR_HPRE);
    RCC->CFGR |= RCC_CFGR_HPRE_DIV1;

    RCC->CFGR &= (~RCC_CFGR_PPRE2);
    RCC->CFGR |= RCC_CFGR_PPRE2_DIV1;

    RCC->CFGR &= (~RCC_CFGR_PPRE1);
    RCC->CFGR |= RCC_CFGR_PPRE1_DIV2;

    /* Set HSI as PLL source,and Enable PLL, P=2,M=16,N=168 */
    RCC->PLLCFGR &= ( (~RCC_PLLCFGR_PLLSRC) & 
                      (~RCC_PLLCFGR_PLLP) & \
                      (~RCC_PLLCFGR_PLLN) & \
                      (~RCC_PLLCFGR_PLLM) );
    RCC->PLLCFGR |= ( RCC_PLLCFGR_PLLSRC_HSI | \
                      RCC_PLLCFGR_PLLN_3 | \
                      RCC_PLLCFGR_PLLN_5 | \
                      RCC_PLLCFGR_PLLN_7 | \
                     (HSI_VALUE/1000000u) );

    RCC->CR |= RCC_CR_PLLON;

    /* Test if PLL is ready */
    while( (RCC->CR & RCC_CR_PLLRDY) == 0u ){
        ;
    }

    /* Switch pll as system clock */
    RCC->CFGR &= (~RCC_CFGR_SW);
    RCC->CFGR |= RCC_CFGR_SW_PLL;

    /* Test if pll switch successfully */
    while( (RCC->CFGR & RCC_CFGR_SWS_PLL) == 0u ){
        ;
    }

    return;
}

192行：                                                        /* 说明：USART3更改为USART2，USART2和3都在APB1总线上,而且总线频率都是42MHz */  
static void tm_inituart(void)
{
    uint32_t data;

    /* GPIOA clock enable */
    RCC->AHBENR |= RCC_AHBENR_GPIOAEN;

    /* USART2 clock enable */
    RCC->APB1ENR |= RCC_APB1ENR_USART2EN;

    /* set PA2/PA3 to Alternate function for USART2 transmit/receive */
    data = GPIOA->MODER;
    data &= (~GPIO_MODER_MODER2);
    data |= ( GPIO_MODER_MODER2_1 );
    GPIOA->MODER = data;

    data = GPIOA->OTYPER;
    data &= ( ~(GPIO_OTYPER_OT_2) );
    GPIOA->OTYPER = (uint16_t)data;

    data = GPIOA->PUPDR;
    data &= ( ~(GPIO_PUPDR_PUPDR2) );
    data |= (GPIO_PUPDR_PUPDR2_0 );
    GPIOA->PUPDR = data;

    data = GPIOA->OSPEEDR;
    data &= ( ~(GPIO_OSPEEDER_OSPEEDR2) );
    data |= ( GPIO_OSPEEDER_OSPEEDR2 );
    GPIOA->OSPEEDR = data;

    data = GPIOA->AFR[0];
    data &= ( ~( GPIO_AFR_MASK << GPIO_AFRL_SHIFT(2u) ) );
    data |= ( GPIO_AFR_AF1 << GPIO_AFRL_SHIFT(2u) );
    GPIOA->AFR[0] = data;

    data = GPIOA->MODER;
    data &= (~GPIO_MODER_MODER3);
    data |= ( GPIO_MODER_MODER3_1 );
    GPIOA->MODER = data;

    data = GPIOA->PUPDR;
    data &= ( ~(GPIO_PUPDR_PUPDR3) );
    data |= (GPIO_PUPDR_PUPDR3_0 );
    GPIOA->PUPDR = data;

    data = GPIOA->OSPEEDR;
    data &= ( ~(GPIO_OSPEEDER_OSPEEDR3) );
    data |= ( GPIO_OSPEEDER_OSPEEDR3 );
    GPIOA->OSPEEDR = data;

    data = GPIOA->AFR[0];
    data &= ( ~( GPIO_AFR_MASK << GPIO_AFRL_SHIFT(3u) ) );
    data |= ( GPIO_AFR_AF1 << GPIO_AFRL_SHIFT(3u) );
    GPIOA->AFR[0] = data;

    /* Disable USART and TX and RX */
    USART2->CR1 &= 0xdff3u;

    /* Clear STOP bit,CLKEN,CPOL,CPHA */
    USART2->CR2 &= 0x8060u;

    /* Set 8bit,non parity,no interupt */
    USART2->CR1 &= 0xe80fu;

    /* Disable CTS and DMA */
    USART2->CR3 &= 0xf800u;

    /* Set baud=115200bps */
    USART2->BRR = 0x016cu;

    /* Enable receiver and transmitter and USART */
    USART2->CR1 |= USART_CR1_MME | USART_CR1_RE | USART_CR1_TE | USART_CR1_UE;

    return;
}

295行：                                                        /* 说明：USART3更改为USART2 */   
void tm_senduart(uint8_t c)
{
    /* Wait for the transmitter to be ready while */
    while( (USART2->SR & USART_SR_TXE) == 0u){
        ;
    }

    /* Send character */
    USART2->DR = c;

    /* Wait for the transmitter to be ready while */
    while( (USART2->SR & USART_SR_TXE) == 0u){
            ;
    }

    return;
}

321行：                                                        /* 说明：USART3更改为USART2 */ 
uint8_t tm_recvuart(void)
{
    uint8_t c;

    /* Wait for the receiver to be ready while */
    while( ((USART2->SR) & USART_SR_RXNE) == 0u){
         ;
    }

    c = (uint8_t)USART2->DR;

    return c;
}