ADR: Timer Vs Loop - SystemModeller/primarysystem GitHub Wiki

Timers Vs Loops

The system will be responsible for simulating numerous PLC (Programmer Logical Controllers) outputs, timing is critical.

As many of the outputs will be second-by-second it's important that a good way to render numerous outputs frequently is used, especially as the process may run into hundreds of devices. After comparing loops and timers I've decided upon using timers as these offer a closer replication of the industrial usage represented by PLC's.