Introduction to the ARM - Sushmitashivashimpi/ARM GitHub Wiki

Features of ARM Instruction Set

  • Load-store architecture
  • 3-address instructions
  • Conditional execution of every instruction
  • Possible to load/store multiple registers at once
  • Possible to combine shift and ALU operations in a single instruction

Data Processing Instruction Format

  • All operands are 32 bits wide and come from registers or are specified as literals in the instruction itself.
  • The result, if there is one, is 32 bits wide and is placed in a register. (There is an exception here: long multiply instructions produce a 64-bit result)

Data Processing Instruction Format

Picture1

Immediate Addressing Mode

The desired value is presented as a binary value in the instruction (immediate operand)

Ex

ADD R3, R3, #1 @ R3:=R3+1

AND R8, R7, #0xFF @ R8=R7

ADD R9, R8, #0XAB

Register Addressing Mode

The desired value is in a register and the instruction contains the register number (register operand)

Ex

MOV RO, R1

ADD R0, R1, R2

SUB R2, R1, R0

Shifted Register Operands

One operand to ALU is routed through the Barrel shifter. Thus, the operand can be modified before it is used. Useful for dealing with lists, tables, and other complex data structures. (similar to the displacement addressing mode in CISC.)

Picture1

The desired value is a shifted register

Ex

MOV R0,R1,LSL #1

ADD R0,R1,R2,LSR,#1

Logical Shift Left(LSL)

LSL provides the value of a register multiplied by a power of two. This instruction insert zeros into the vacated bit positions.

MOV R0, R2, LSL #2 @ R0:=R2<<2

@ R2 unchanged

Example: 0…0 0011 0000

Before R2=0x00000030

After R0=0x000000C0

R2=0x00000030

Logical Shift Right(LSR)

  LSR provides the unsigned value of a register divided by a variable power of two. This instruction insert zeros into the vacated bit positions.

MOV R0, R2, LSR #2 @ R0:=R2>>2

@ R2 unchanged

Example: 0…0 0011 0000

Before R2=0x00000030

After R0=0x0000000C

R2=0x00000030

Arithmetic Shift Right(ASR)

ASR provides the signed value of the contents of a register divided by a power of two. It copies the sign bit into vacated bit positions on the left.

MOV R0, R2, ASR #2 @ R0:=R2>>2

@ R2 unchanged

Example: 1010 0…0 0011 0000

Before R2=0xA0000030

After R0=0xE800000C

R2=0xA0000030

Rotate Right(ROR)

ROR provides the value of the contents of a register rotated by a value. The bits that are rotated off the right end are inserted into the vacated bit

positions on the left.

MOV R0, R2, ROR #2 @ R0:=R2 rotate

@ R2 unchanged

Example: 0…0 0011 0001

Before R2=0x00000031

After R0=0x4000000C

R2=0x00000031