THEORY - Rutujakage1/I2C-Protocol-using-Verilog GitHub Wiki

Block Diagram

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Theoretical Background

  • I2C communication is the short form for inter-integrated circuits. *I2C protocol is a simple two wire line protocol which is used to transfer data from one device to another device. I2C Bus (Interface wires) consists of just two wires and are named as Serial Clock Line (SCL) and Serial Data Line (SDA). *I2C is simple, bidirectional, half Duplex protocol. *This Serial Communication Protocol is developed by Philips Semiconductor (NXP Semiconductors). *This is a type of synchronous serial communication protocol. It means that data bits are transferred one by one at regular intervals of time set by a reference clock line.

Master and Slave Devices

The devices connected to the I2C bus are categorized as either masters or slaves. Each slave device has a 7-bit address that needs to be unique on the bus. When a master device wants to transfer data to or from a slave device, it specifies this particular slave device address on the SDA line and then proceeds with the transfer. So effectively communication takes place between the master device and a particular slave device.

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*In normal state both lines (SCL and SDA) are high. *The communication is initiated by the master device. *It generates the Start condition followed by the address of the slave device. *If the bit 0 of the address byte was set to 0 the master device will write to the slave device. Otherwise, the next byte will be read from the slave device.
*All the slave devices on the I2C bus compare these address bits with their address. *Once all bytes are read or written the master device generates Stop condition . *This signals to other devices on the bus that the communication has ended and another device may use the bus.

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