chapter12 - PacoReinaCampo/MPSoC-OR1K GitHub Wiki

HARDWARE DESIGN

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DETAILED DESIGN PROCESS

The detailed design process produces detailed design data using the hardware item requirements and conceptual design data as the basis for the detailed design.

Detailed Design Objectives

The detailed design process objectives are:

The detailed design is developed from the hardware item requirements and conceptual design data.
Derived requirements are fed back to the conceptual design process or other appropriate processes.
Requirement omissions or errors are provided to the appropriate processes for resolution.

Detailed Design Process Activities

Guidance for the detailed design activities includes:

The detailed design data for the hardware item should be generated based on the requirements and conceptual design data. This may include assembly and interconnection data, component data, HDL, test methods and hardware-software interface data.

Note: During the detailed design process, verification methods are used informally to facilitate the technical decisions made during this process. For example, analysis of design parameters, such as logic timing and parameter variations, can provide information on which to base design decisions.
Architectural design techniques should be implemented as necessary. These may include establishing safety monitors for proper functionality, dissimilarity between function and safety monitors, preclusion of a design error from impacting safety, and fault tolerant designs.
Test features should be designed in, where necessary, to allow verification of safety requirements.

Note: It is important to develop the design in a way that certain safety features can be verified not only during the hardware design life cycle, but also as a part of an acceptance test and a field return to service test.
An assessment of unused functions should be performed to identify potential effects on safety. Adverse effects should be addressed.
Constraints on the design, installation or operation of the hardware item that, if not adhered to, could affect the safety of the item should be identified.
Derived requirements produced during the detailed design process should be fed back to the conceptual design or other appropriate processes.
Requirement omissions and errors discovered during the detailed design process should be provided to the appropriate process for resolution.

LANGUAGES

Vhdl Language

Overview

Normative references

Design entities and configurations

Subprograms and packages

Types

Declarations

Specifications

Names

Expressions

Sequential statements

Concurrent statements

Scope and visibility

Design units and their analysis

Elaboration and execution

Lexical elements

Predefined language environment

VHDL Procedural Interface overview

VHPI access functions

VHPI information model

VHPI tool execution

VHPI callbacks

VHPI value access and update

VHPI function reference

Standard tool directives

Verilog Language

Overview

Normative references

Lexical conventions

Data types

Expressions

Assignments

Gate- and switch-level modeling

User-defined primitives (UDPs)

Behavioral modeling

Tasks and functions

Scheduling semantics

Hierarchical structures

Configuring the contents of a design

Specify blocks

Timing checks

Backannotation using the standard delay format (SDF)

System tasks and functions

Value change dump (VCD) files

Compiler directives

Programming language interface (PLI) overview

PLI TF and ACC interface mechanism (deprecated)

Using ACC routines (deprecated)

ACC routine definitions (deprecated)

Using TF routines (deprecated)

TF routine definitions (deprecated)

Using Verilog procedural interface (VPI) routines

VPI routine definitions

Protected envelopes