Product_OPL1200 - Opulinks-Tech/OpulinksTech-WIKI GitHub Wiki
【OPL1000】 | 【OPL1200】 |【OPL2500】
芯片特色
The OPL1200 complies with ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
◼ Processors
- ARM®Cortex®-M3 Application Processor
- ARM®Cortex®-M0 Link Controller
◼ Wi-Fi
- 802.11b up to 11Mbps
- Supports STA mode
- WPA/WPA2 security supported
- Automatic beacon scanning and discovery
- Built-in TCP/IP stack
- Integrated dual power amplifiers: low (-2 dBm), high (+10 dBm) † † Optional internal T/R switch by-pass mode available to increase to +12dBm
◼ Bluetooth Smart
- Compliant with Bluetooth 5.0 BLE specifications with 2Mbps rate capability
- Slave mode support
- All GATT-based profiles supported
- Built-in BLE stack
- 0 to 10 dBm transmit output power
- -93 dBm receive sensitivity
◼ Memories
-
Embedded 8Mbit SPI Flash
◼ HW Crypto Engine
- AES-128/256 bits Encryption
- P-192/256 ECDH (Elliptic Curve Diffie-Hellman) Key Generation
- SHA2
- TRNG
◼ Power Management
- Integrated Buck DC-DC converter
◼ General purpose, capture and sleep timers
◼ FW OTA (Over-The-Air) update support
◼ Digital Interfaces
- General purpose I/Os: 24
- Two UARTs with hardware flow control up to 3Mbps
- Three SPI+™ interfaces
- One I2C bus at 100 kHz, 400 kHz
◼ Analog Interfaces
- 10-bit Auxiliary ADC inputs up to 16 channels
- Six GPIO pins with 16mA driving capability
- Six PWMs
◼ Radio Transceiver
- Fully integrated dual-mode 2.4 GHz CMOS transceiver
- Single wire antenna: no external matching and no external T/R switch required
◼ Package
- 48-pin QFN, 6 mm x 6 mm
📓 [文檔] OPL1200-DataSheet-NonNDA
OPL1000系列
:point_right:【OPL1000】 | 【OPL1200】