Embedded Linux on DE1 SoC: Building Linux Kernel on SD Card - NicolasSchuck/EmbeddedLinux_De1-SOC GitHub Wiki

Introduction

Now we are going to setup our first Embedded Linux project. This page will be based on the previously mentioned Document [1] of Mariano Ruiz and Antonio Carpeño. The task is to update it and get it running on newer tool versions.

This is just a step by step manual to document my project. For more detailed information review [1].

Adding Files to Project

add soc_system.qip to project "Project -> Add/remove Files in Project..."
add soc_system.top.vhd to project "Project -> Add/remove Files in Project..."
"apply" and quit with "OK"
set soc_system_top.vhd as top level via right click

images/EmbeddedLinux/instantiateSystem/instantiateSystem1.png

copy the component declaration generated in "./DE1_SoC/DE1_SoC.cmp" to your top level "./DE1_SoC_top.vhd" in the declarative zone of your achitecture
remove “hps_p_h2f_reset_reset_n” for now

Verify Design

Execute "Analysis and Synthesis" (CTRL + K) to verify your design up to now (this may take some minutes)
run hps_sdram_p0_pin_assignments.tcl "Tools -> Tcl Scrips..." under folder "submodules"

images/EmbeddedLinux/instantiateSystem/instantiateSystem2.png

Compile Design

compile the Design "Start Compilation" (CTRL + L) (get a coffe... this will take some time - 10 to 20 minutes depending on your system)

Convert .sof to .rbf via SoC EDS Command Shell

open terminal in "intelFPGA/20.1/embedded"

./embedded_command_shell.sh

cd ~/pathOfYourOutputFolder

quartus_cpf -c -o bitstream_compression=on nameOfSof.sof nameOfRbf.rbf

Generate Preloader

Install needed Packages

sudo apt-get install gawk wget git-core diffstat unzip texinfo \
gcc-multilib  build-essential chrpath socat cpio python python3 \
python3-pip python3-pexpect  xz-utils debianutils iputils-ping \
python3-git python3-jinja2 libegl1-mesa libsdl1.2-dev pylint3 xterm \
libncurses-dev gawk flex bison openssl libssl-dev

Execute "embedded_command_shell.sh"

cd ~/intelFPGA/18.1/embedded
./embedded_command_shell.sh 
cd ~/ProjectLocation/

Run the BSP Editor

bsp-editor

images/EmbeddedLinux/instantiateSystem/bsp_editor1.png

Click "File->New HPS BSP..."

images/EmbeddedLinux/instantiateSystem/bsp_editor2.png

Select "hps_isw_handoff/DE1_SoC_hps_0" as Preloader settings directory, click "OK" then "Generate"
Build the preloader image

cd software/spl_bsp
make

Generate .rbf

cd ./ProjectLocation/output_files
quartus_cpf -c -o bitstream_compression=on DE1-SoC.sof DE1_SoC.rbf

Generate device tree

cd ./ProjectLocation/
sopc2dts --input DE1_SoC.sopcinfo --output DE1_SOC.dtb --type dtb --board soc_system_board_info.xml --board hps_common_board_info.xml --clocks

Create U-Boot script

nano boot.script

#boot.script
fatload mmc 0:1 $fpgadata DE1_SoC.rbf;
fpga load 0 $fpgadata $filesize;
setenv fdtimage DE1_SoC.dtb;
run bridge_enable_handoff;
run mmcload;
run mmcboot;

Generate u-boot.scr

./software/spl_bsp/uboot-socfpga/tools/mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "My script" -d boot.script u-boot.scr

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