Std. Core: Output Port Lookup (NIC) - NetFPGA/NetFPGA-SUME-public GitHub Wiki

Name

nic_output_port_lookup

Version

v1.0.0

Author

Original version for nf10:

Adam Covington (gcoving_at_stanford.edu)

James Hongyi Zeng (hyzeng_at_stanford.edu)

Modified for NetFPGA-SUME by:

Noa Zilberman

Type

IP core (HW)

Location

lib/hw/std/cores/nic_output_port_lookup_v1_0_0/

Interface Types

AXI4-Stream

AXI-Lite

Busses

S_AXIS: Slave AXI4-Stream bus, Variable width

M_AXIS: Master AXI4-Stream bus, Variable width

Parameters

C_M_AXIS_DATA_WIDTH: Data width of the master AXI4-Stream data bus.

C_S_AXIS_DATA_WIDTH: Data width of the slave AXI4-Stream data bus.

C_M_AXIS_TUSER_WIDTH: Data width of the master TUSER bus.

C_S_AXIS_TUSER_WIDTH: Data width of the slave TUSER bus.

C_BASEADDR: Base address value of the core.

C_HIGHADDR: High address value of the core.

Register map

This module uses register infrastructure Ver 1.00, please refer to here for more details.

0x0 : ID - Block ID

0x4 : VERSION - Block Version

0x8 : FLIP - Returns the negative value of a written register

0xC : COUNTERIN - Total number of incoming packets

0x10: COUNTEROUT - Total number of outgoing packets

0x14: DEBUG - Debug register, returns the written value plus a preconfigured value

Description

The function of this block is to set the destination port meta data field for all packets. In the NIC every packet from an SFP+ connection is sent to the host. This is done by setting the destination port to be that of the host. When a packet is from the host the source port meta data is used to set the correct destination port for the SFP+ connection.