OpC_60 6F - Nakazoto/CenturionComputer GitHub Wiki

47 and 67 Instructions

These instructions appear to operate on strings or memory blocks. The general form is 47 ssssmmnn followed by the operands. m and n are the CPU6 addressing modes. 47 4x and 47 8x have an additional literal byte length argument (length of block - 1). 47 2x has two additional arguments,

67 instructions are identical to 47 instructions, except when relevant, they take their length argument in register AL (WIP, it is unknown if 67 instructions are limited to 8bit lengths)

Selector Opcode 1st Operand 2nd Operand 3rd Operand 4th Operand Description
0 binload BaseAddress record Implements most of the Centurion binary record format in Microcode.
1 strcmp?
2 condcpy? MaxCount - 1 (implicit) byte to match Src Dest Copies from Source to Dest until matching byte is found (can be used as strcpy). Sets Fault if no match found. Sets Y to match in Src. Sets Z to match in Dest
4 memcpy Count - 1 Count Length any mode count length memory copy block of memory from first argument to second argument
8 memcmp Count - 1 Count Length any mode count length memory compare two blocks of memory
9 memset Count - 1 Single Byte count length memory copies first arg repeated to second arg