OpC_30 3F - Nakazoto/CenturionComputer GitHub Wiki
3x Extended Addressing
If an odd register is specified for a 3x instruction, the operation is on memory. Note that this is still very much WIP.
For a register specifier of 1, the effective address is the direct address of the word following. For other odd registers, the effective address is indexed from the relative 16 bit register.
| Register Nibble | Meaning | Example | Description |
|---|---|---|---|
| 1 | Direct | 32 12 1234 |
Clear word at address 1234 to 2 |
| 3 | Indexed B | 32 32 1234 |
Clear word at address 1234 + B to 2 |
| 5 | Indexed X | 32 52 1234 |
Clear word at address 1234 + X to 2 |
| 7 | Indexed Y | 32 72 1234 |
Clear word at address 1234 + Y to 2 |
| 9 | Indexed Z | 32 92 1234 |
Clear word at address 1234 + Z to 2 |
| b | Indexed S | 32 B2 1234 |
Clear word at address 1234 + S to 2 |
| d | Indexed C | 32 D2 1234 |
Possibly illegal. Clear word at address 1234 + C to 2 |
| f | Indexed P | 32 F2 1234 |
Clear word at address 1234 + P to 2 |