DSK AUT and DSK II Boards - Nakazoto/CenturionComputer GitHub Wiki

DSK AUT and DSK II Boards

The DSK AUT and DSK II board work in tandem to control the CDC 9427H Hawk drive. Furthermore, the DSK AUT, which stands for Disk Autoload, board also contains an MM1702 EPROM that has the bootstrap code for the CPU4 systems. The cards are still usable in CPU5 and CPU6 systems, however the EPROM is disabled as the bootstrap code is now contained on the Backplane.

DSK / AUT

This is the Disk/Autoload board. The EPROM located in the center indicates that this is an early board revision. Later revisions that were intended only for use with CPU5 and CPU6 systems are largely identical, but do not contain the EPROM chip.

Right click and "Save As..." or "Open Image in New Tab" for full resolution.

DSK II

This is the Disk II board. As of this moment, very little is known about the DSKII board itself.

Right click and "Save As..." or "Open Image in New Tab" for full resolution.

MMIO Control

The Hawk drive can be controlled via direct Memory Mapped Input Output (MMIO) addressing. Below is a table of the specific addresses and their functions. Credit Meisaka and Ken Romaine for the amazing work remembering and reverse engineering the full MMIO usage of the Hawk.

  • F14F -> Clear Interrupts (write only)

    • De-assert DSK2 interrupt

  • F14E -> Enable Interrupts (write only)

  • F14D -> Disable Interrupts (write only)

    • DSK2 interrupts retain their asserted state

  • F14C -> Assert DSK2 Interrupt (write only)

  • F14B -> Reset DSK Cards (write only)

  • F14A -> Diag. Clock Control (write only)

    • 0000 = Internal clock, clear
    • 0001 = Internal clock, no change
    • 0010 = Internal clock, toggle
    • 0011 = Internal clock, set
    • 0000 = Sep Read clock, clear
    • 0100 = Sep Read clock, no change
    • 1000 = Sep Read clock, toggle
    • 1100 = Sep Read clock, set

  • F149 -> Diag. Control Register/Status Register

    • F149 Write
      • 0000 0001 = Asserts Separated Read Data pin
      • 0000 0010 = Asserts Sector Index Pulse pin
      • 0000 0100 = Asserts On Sector signal (DSK1/2)
      • 0000 1000 = enables diag. features and asserts, clock control, and disables main crystal clock, DMA bus output, and timeout errors
    • F149 Read
      • Current state of output shift register

  • F148 -> Hawk Command/Status Register

    • F148 Write
      • 00: Read
      • 01: Write
      • 02: Seek
      • 03: RTZ
      • 04: Verify read
      • 05: Format command step 2
      • 06: Format command step 1
    • F148 Read
      • Current state of input shift register

  • F147 -> Unused

  • F146 -> Unused

  • F144/F145 -> Hawk Status Register (read only)

    • F144: Read Status
      • 0000 0000 = All good
      • 0000 0001 = DSK2 Busy
      • 0000 0010 = Hawk fault
      • 0000 0100 = Hawk seek error
      • 0000 1000 = Set by Hawk spare, cleared by DSK2 RTZ
      • 0001 0000 = Format error
      • 0010 0000 = Sector address error
      • 0100 0000 = CRC error
      • 1000 0000 = Timeout error
    • F145: Drive Status (Bits can be combined)
      • 0000 0001 = Seek complete from drive 1
      • 0000 0010 = Seek complete from drive 2
      • 0000 0100 = Seek complete from drive 3
      • 0000 1000 = Seek complete from drive 4
      • 0001 0000 = Drive ready
      • 0010 0000 = On cylinder
      • 0100 0000 = Write Enable on?
      • 1000 0000 = Write Protect on

  • F143 -> Write bit mask (0 = protect, 1 = write)

    • 0000 0001 = Drive 1, Platter 0
    • 0000 0010 = Drive 1, Platter 1
    • 0000 0100 = Drive 2, Platter 0
    • 0000 1000 = Drive 2, Platter 1
    • 0001 0000 = Drive 3, Platter 0
    • 0010 0000 = Drive 3, Platter 1
    • 0100 0000 = Drive 4, Platter 0
    • 1000 0000 = Drive 4, Platter 1

  • F141/F142 -> Sector address register

    • 00CC CCCC CCCH SSSS (C = Cylinder, H = Head, S = Sector)
      • 0000 1110 010.0 0101 = Cylinder 0x72, Head 0, Sector 0x5
      • 0011 0010 000.1 1010 = Cylinder 0x190, Head 1, Sector 0xA

  • F140 -> Unit select register (will read with "F" in high byte)

    • 0000 0000 = Drive 1, Platter 0
    • 0000 0001 = Drive 1, Platter 1
    • 0000 0011 = Drive 2, Platter 0
    • 0000 0100 = Drive 2, Platter 1
    • 0000 0101 = Drive 3, Platter 0
    • 0000 0110 = Drive 3, Platter 1
    • 0000 0111 = Drive 4, Platter 0
    • 0000 1000 = Drive 4, Platter 1

Schematics

Meisaka has once again done some staggeringly good reverse engineering work on the FFC cards. We believe the schematic is 99% done with only minor things left to verify. The quality of the PNG created for display here is lacking, so click this link here to view the full SVG file.

Right click and "Save As..." or "Open Image in New Tab" for full resolution.

ROM Backups

The only ROM on the DSK/AUT board is the MM1702 Ceramic EPROM in the center of the board that contains the bootstrap code for CPU4 systems. The DSK/AUT and DSKII board work in tandem to interface with the CDC Hawk Drive.

Board Location Usage IC Link
DSK/AUT E4 Bootstrap MM1702 Link

And here's a closeup of the die on the ROM simply because I think it looks awesome: