BPMP Communication Support

Feature Name: Support for communication with the BPMP-FW

PI Phase supported: DXE

SMM Required: No

References

Jetson Xavier Power Mangement

Purpose

Clock, reset, and power gates are controlled by the firmware running on the BPMP processor. In order to support changes in these a IPC method is needed. UEFI provides several drivers that support this.

High Level Theory of Operation - Configuration Manager and Platform Repository

The UEFI BpmpIpc driver works with the device discovery framework to find the information regarding the doorbells and shared memory used to communicate with the BPMP-FW. This driver starts early in the UEFI boot and will synchronize with the BPMP-FW to setup this communication channel. Once that is availble other services will be exposed over this to allow for system control.

If the BPMP node is not present in the device tree the BpmpIpc driver will create a dummy instance that returns success to all requests.

Modules

edk2-nvidia/Silicon/NVIDIA/Drivers/BpmpIpc

This driver provides communication with the BPMP-FW. It is required for any communication.

edk2-nvidia/Silicon/NVIDIA/Drivers/BpmpI2c

This driver provides access to I2C devices that are owned by the BPMP-FW.

edk2-nvidia/Silicon/NVIDIA/Drivers/BpmpScmi

This driver provides clock control APIs via the BPMP

edk2-nvidia/Silicon/NVIDIA/Drivers/DeviceDiscovery

This driver provides information regarding the communication channel for BPMP. It will also provide protocols on devices that it enumerates to abstract power gates, reset control and clocks based on the contents of the device tree that UEFI is consuming.