Demo for iMX93 BSP and Zephyr RTOS on A55 - MarekBykowski/readme GitHub Wiki
i.XM93
Cortex-A55 is ARMv8.2-A
BSP for i.XM93
i.XM supports Yocto building
Install repo tool
git clone https://gerrit.googlesource.com/git-repo
iMX manifest is here https://github.com/nxp-imx/imx-manifest
Clone manifest using the repo tool
./git-repo/repo init -u https://github.com/nxp-imx/imx-manifest -b imx-linux-scarthgap -m imx-6.6.52-2.2.0.xml
./git-repo/repo sync
DISTRO=fsl-imx-xwayland MACHINE=imx93evk source imx-setup-release.sh -b build
You can test-run it on AVH
Login to Corellium: https://app.avh.corellium.com/login
imx93 AVH image creation
Typical boot sequence for Cortex-A55
BL0 (BootROM) –> BL1 (SPL u-boot) –> BL31 ( from arm-trusted-firmware) –> BL33 (u-boot) –> Linux kernel -> rootfs
If Trusted Zone than there is OPTEE-OS and Trusted Apps.
Boot up/image for Cortex-M33
Image for Cortex-M33 isn't built by Yocto. It is downloaded as a binary artifact and integrated.
$ pwd
/yocto/yocto-team/mbykowsx/imx-yocto-bsp/build_imx93evk
[mbykowsx@GNR-JF04-5350 build_imx93evk]$ find ../sources/ -name "*imx-m33-demos*"
../sources/meta-freescale/recipes-fsl/mcore-demos/imx-m33-demos_2.16.000.bb
../sources/meta-imx/meta-imx-bsp/recipes-fsl/mcore-demos/imx-m33-demos_2.16.000.bb
SRC_URI="https://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx93-m33-demo-2.16.000.bin;fsl-eula=true;name=imx93"
Click here https://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx93-m33-demo-2.16.000.bin
RTOS on A55 in i.XM93 on Zephyr example
Typically Zephyr has the code to bring A55 up. It can though integrate some, eg. bl31.
Run Zephyr on FVP
FVP is FVP_Base_RevC-2xAEMvA
Fast Model FVP (Fixed-Virtual-Platform)
- They utilize
Programmer’s View(PV) models of processors and devices- These are equivalent to what a programmer would see using the hardware
- you can use the
PVmodels for confirming software functionality, but you must not rely on the accuracy ofcycle counts,bus traffic,execution timing
Eg. re-ordering and buffering of memory accesses, out-of-order execution, speculative prefetch and drain-buffers can cause timing differences. They are not modeled, since they are not visible to the programmer.
Fast Modelscan:
- Accurately model instructions
- Correctly execute architecturally-correct code
Fast Modelscannot:
- Model timing sensitive behavior, real HW can retire instruction if speculation was unsuccessful
- Model bus traffic, do not support bus contention, QoS
- As a result you cannot measure software performance
Bootom line: ☝ architecturally correct software cannot tell between running on hardware and running on the model.
$ ./run_hello_fvp_cortex-a.sh
[0/1] cd /home/xxbykowm/zephyrproject/zephyr/build && /home/xxbykowm/Downloads/Base_RevC_AEM_Fast_Models_11.26/Base_RevC_AEMvA_pkg/models/Linux64_GCC-9.3/FVP_Base_RevC-2xAEMvA -C bp.secure_memory=0 -C cluster0.NUM_CORES=1 -C bp.refcounte
r.non_arch_start_at_default=1 -C bp.pl011_uart0.out_file=- -C bp.pl011_uart0.unbuffered_output=1 -C bp.terminal_0.start_telnet=0 -C bp.pl011_uart1.out_file=- -C bp.pl011_uart1.unbuffered_output=1 -C bp.terminal_1.start_telnet=0 -C bp.pl0
11_uart2.out_file=- -C bp.pl011_uart2.unbuffered_output=1 -C bp.terminal_2.start_telnet=0 -C bp.pl011_uart3.out_file=- -C bp.pl011_uart3.unbuffered_output=1 -C bp.terminal_3.start_telnet=0 -C bp.vis.disable_visualisation=1 -C bp.vis.rate
_limit-enable=0 -C gic_distributor.ARE-fixed-to-one=1 -C gic_distributor.ITS-device-bits=16 -C cache_state_modelled=0 -a /home/xxbykowm/zephyrproject/zephyr/build/zephyr/zephyr.elf
terminal_0: Listening for serial connection on port 5000
terminal_1: Listening for serial connection on port 5001
terminal_3: Listening for serial connection on port 5002
terminal_2: Listening for serial connection on port 5003
*** Booting Zephyr OS build v4.1.0-rc1-57-g50c21f159143 ***
thread_a: Hello World from cpu 0 on fvp_base_revc_2xaemv8a!
thread_b: Hello World from cpu 0 on fvp_base_revc_2xaemv8a!
thread_a: Hello World from cpu 0 on fvp_base_revc_2xaemv8a!
thread_b: Hello World from cpu 0 on fvp_base_revc_2xaemv8a!