CYD chip registers map - LTVA1/klystrack GitHub Wiki

This is a fictional chip regitsers map. CYD comes from the name of klystrack sound engine.

Chip

CYD chip has 128 channels, al equal in functionality. Every channel has 0.5KiB (512) of 8-bit hardware registers. Chip connects to the main control device of your choice via 8-bit data bus and 16-bit address bus. Input clock frequency can vary from 0.5 MHz to 100 MHz. You must hold signals on data and address buses for at least 1 cycle in order for chip to actually read the data.

Channels' registers banks come one after another. The last 4 registers (e.g. $1FC-$1FF for channel 0) contain output of that channel in Sint32 variable form. Registers $FFF7-$FFFB contain overall output data from all channels in the same format.

All registers are readable. Unused registers/bits always return 0. * means that bit(s) go unused.

Here only addresses of channel 0 are written. To obtain arbitrary channel’s address, simply add $1FF * channel_number to the address from table below.

Address

Bits: 7

6

5

4

3

2

1

0

$0000

Sync oscs on gate enable

Enable gate

Pulse

Triangle

Sawtooth

Noise

Short noise period

Enable POKEY LFSR

7

6

5

4

3

2

1

0

$0001

POKEY LFSR mode

Pulse width MSBs

$0002

Pulse width lower byte

7

6

5

4

3

2

1

0

$0003

Lock noise pitch

Noise note (only if Lock noise pitch is set to 1)

7

6

5

4

3

2

1

0

$0004

Enable sample

Lock oscillators to base note

Lock sample to base note

Sample: override volume envelope

Enable relative volume

Oscillators' mix mode

7

6

5

4

3

2

1

0

$0005

Enable filter

Filter mode

Filter cutoff MSBs

$0006

Filter cutoff lower byte

7

6

5

4

3

2

1

0

$0007

Filter slope

Filter resonance

Divide oscillators frequency by 4

7

6

5

4

3

2

1

0

$0008

Enable 1-bit noise

Enable exponential volume

Enable exponential attack

Enable exponential decay

Pitch MSBs

$0009

Pitch higher byte

$000A

Pitch lower byte

$000B

Sample index

$000C

Sample start offset higher byte

$000D

Sample start offset lower byte

$000E

Sample end offset higher byte

$000F

Sample end offset lower byte

$0010

Volume

$0011

Panning ($0 is left, $80 is center, $FF is right)

7

6

5

4

3

2

1

0

$0012

Attack

Decay MSBs

7

6

5

4

3

2

1

0

$0013

Decay LSBs

Sustain MSBs

7

6

5

4

3

2

1

0

$0014

Sustain lowest bit

Release

Enable envelope key scaling

$0015

Envelope key scaling level

7

6

5

4

3

2

1

0

$0016

Enable volume key scaling

Enable AY envelope

AY8930 envelope mode

Envelope shape

Enable ring mod

Enable hard sync

Send to fx bus

$0017

Volume key scaling level

$0018

AY envelope detune frequency higher byte

$0019

AY envelope detune frequency lower byte

$001A

Ring mod source

$001B

Hard sync source

7

6

5

4

3

2

1

0

$001C

FX bus number

Enable multiosc. mode

Enable 2-op FM

$001D

Multiosc mode note 1

$001E

Multiosc mode note 2

7

6

5

4

3

2

1

0

$001F

FM use sample

FM enable exp. vol.

FM enable exp. atk.

FM enable exp. dec.

FM modulator pitch MSBs

$0020

FM modulator pitch higher byte

$0021

FM modulator pitch lower byte

$0022

FM modulator sample index

$0023

FM modulator sample start offset higher byte

$0024

FM modulator sample start offset lower byte

$0025

FM modulator sample end offset higher byte

$0026

FM modulator sample end offset lower byte

7

6

5

4

3

2

1

0

$0027

FM enable additive mode

FM enable volume key scaling

FM enable envelope key scaling

*

FM freq. table (0 = OPL, 1 = OPN)

FM feedback

$0028

FM modulator volume

$0029

FM modulator volume key scaling level

$002A

FM modulator envelope key scaling level

7

6

5

4

3

2

1

0

$002B

FM modulator frequency multiplier

FM modulator frequency divider

7

6

5

4

3

2

1

0

$002C

FM modulator attack

FM modulator decay MSBs

7

6

5

4

3

2

1

0

$002D

FM modulator decay LSBs

FM modulator sustain MSBs

7

6

5

4

3

2

1

0

$002E

FM modulator sustain lowest bit

FM modulator release

FM modulator enable gate

7

6

5

4

3

2

1

0

$002F

Enable exponential release

FM enable exp. rel.

FM enable 4-op

4-op algorithm

Enable expanded mode (each operator has arbitrary frequency)

Down is the table of 4-op registers which are to come in future CYD chip revisions.

7

6

5

4

3

2

1

0

$0030

Operator 1 enable noise

Operator 1 enable pulse

Operator 1 enable triangle

Operator 1 enable sawtooth

Operator 1 enable hard sync

Operator 1 enable gate

Operator 1 enable key sync

Operator 1 shorten noise cycle

7

6

5

4

3

2

1

0

$0031

Operator 1 enable ring modulation

Operator 1 enable filter

Operator 1 enable sample

Operator 1 sample override volume envelope

Operator 1 enable volume key scaling

Operator 1 enable envelope key scaling

Operator 1 enable exponential volume

Operator 1 enable exponential attack

7

6

5

4

3

2

1

0

$0032

Operator 1 enable exponential decay

Operator 1 enable exponential release

Operator 1 enable fixed noise pitch

Operator 1 enable 1-bit noise

Operator 1 feedback

Operator 1 enable SSG-EG

$0033

Operator 1 sample start offset higher byte

$0034

Operator 1 sample start offset lower byte

$0035

Operator 1 sample end offset higher byte

$0036

Operator 1 sample end offset lower byte

$0037

Operator 1 PW higher byte

7

6

5

4

3

2

1

0

$0038

Operator 1 PW LSBs

Operator 1 pitch MSBs

$0039

Operator 1 pitch higher byte

$003A

Operator 1 pitch lower byte

$003B

Operator 1 volume

7

6

5

4

3

2

1

0

$003C

Operator 1 frequency multiplier

Operator 1 frequency divider

7

6

5

4

3

2

1

0

$003D

Operator 1 enable filter

Operator 1 constant noise note (only in fixed pitch noise mode)

7

6

5

4

3

2

1

0

$003E

Operator 1 filter resonance

Operator 1 filter type

*

7

6

5

4

3

2

1

0

$003F

Operator 1 filter slope

*

Operator 1 filter cutoff MSBs

7

6

5

4

3

2

1

0

$0040

Operator 1 filter cutoff lower byte

$0041

Operator 1 volume key scaling level

$0042

Operator 1 envelope key scaling level

7

6

5

4

3

2

1

0

$0043

Operator 1 attack

Operator 1 decay MSBs

7

6

5

4

3

2

1

0

$0044

Operator 1 decay LSBs

Operator 1 sustain MSBs

7

6

5

4

3

2

1

0

$0045

Operator 1 sustain lowest bit

Operator 1 release

*

7

6

5

4

3

2

1

0

$0046

Operator 1 SSG-EG mode

*

Operator 1 SSG-EG frequency MSBs

$0047

Operator 1 SSG-EG frequency higher byte

$0048

Operator 1 SSG-EG frequency lower byte

$004A

Operator 1 sample index

$004B

*

$004C

*

$004D

*

$004E

*

$004F

*

| `$0000 | | | | | | | | |`

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