Opcode Table - Jimmer1/Chip16 GitHub Wiki

I have compiled this opcode table for ease of reference.

Opcode Mnemonic	Opcode	Opcode Behaviour	Opcode Cycle Count
ACR	6XNN	R[X] $\to$ NN	1
AR	8XY0	R[X] $\to$ R[Y]	1
ADD	8XY4	R[X] $\to$ R[X] $+$ R[Y] R[15] $\to$ carry(R[X] $+$ R[Y])¹	1
ADC	7XNN	R[X] $\to$ R[X] $+$ NN	1
SUB	8XY5	R[X] $\to$ R[X] $-$ R[Y] R[15] $\to$ noborrow(R[X] $-$ R[Y])²	1
RSUB	8XY7	R[X] $\to$ R[Y] $-$ R[X] R[15] $\to$ noborrow(R[Y] $-$ R[X])²	1
OR	8XY1	R[X] $\to$ R[X] \| R[Y]	1
AND	8XY2	R[X] $\to$ R[X] & R[Y]	1
XOR	8XY3	R[X] $\to$ R[X] ^ R[Y]	1
NOT	8X0F	R[X] $\to$ ~R[X]	1
SHR	8XY6	R[X] $\to$ R[X] >> Y R[15] $\to$ nth_bit(R[X], Y)***	1
SHL	8XYE	R[X] $\to$ R[X] << Y R[15] $\to$ nth_bit(R[X], 16 - Y)	1
GOTO	1NNN	PC $\to$ NNN	1
CPAC	BNNN	PC $\to$ (R[0] & 0xFFF) $+$ NNN	2
SNEC	3XNN	if (R[X] $=$ NN): PC $\to$ PC $+$ 2	2
SNUEC	4XNN	if (R[X] $\neq$ NN): PC $\to$ PC $+$ 2	2
SNE	5XY0	if (R[X] $=$ R[Y]): PC $\to$ PC $+$ 2	2
SNUE	9XY0	if (R[X] $\neq$ R[Y]): PC $\to$ PC $+$ 2	2
CALL	2NNN	push(PC); PC $\to$ NNN	3
RET	01EE	PC $\to$ pop(PC)	2
CALLR	EX1C	push(PC); PC $\to$ R[0] & 0xFFF	3
SMP	ANNN	M $\to$ NNN	1
RMP	EX1D	R[X] $\to$ M	1
MPAR	EX1E	M $\to$ M $+$ R[0] & 0xFFF	1
SPL	EX55	*M $\to$ R[X]	3
LD	EX65	R[X] $\to$ *M	3
BAR	CXNN	R[X] $\to$ randint[0, 256) & NN	16
HALT	0000	Program stop	1
SBC	DXNN	R[X] $\to$ R[X] $-$ NN	1

Note: Device opcodes have been omitted because it cannot be known how long each device will take to perform each instruction.

$$ carry(A + B) = \begin{cases} 1 & \quad \text{if } A + B > 2^{16}\\ 0 & \quad \text{if } A + B < 2^{16} \end{cases} $$

$$ noborrow(A - B) = \begin{cases} 1 & \quad \text{if } A - B > 0\\ 0 & \quad \text{if } A - B < 0 \end{cases} $$