Serial Peripheral Interface - ISpillMyDrink/UEFI-Repair-Guide GitHub Wiki

The Serial Peripheral Interface (SPI) is a four-wire serial bus often used in embedded systems and the de facto standard for communication between a PC's chipset and the flash components that contain the firmware (on older devices flash components may be connected to the Low Pin Count bus instead). The SPI bus consists of the serial clock line (SCLK/SCK), the master output/slave input (MOSI), the master input/slave output (MISO), and the chip select line (SS/CS). To establish communication via the SPI protocol, the master device (of which there can be only one on any given bus, and for our purposes will always be either the chipset or an embedded controller) selects the slave device via the CS line and drives the SCLK at a frequency less or equal to the maximum frequency supported by the slave (in Intel systems that will typically be 20, 33, or 50Mhz depending on the configuration of the PCH). Each clock cycle the master sends 1 bit to the slave and the slave sends 1 bit to the master, so communication is full-duplex.

Dual/Quad SPI

Dual SPI is an extension of the SPI protocol that adds the ability for the master to request responses both from the MISO line and the MOSI line via a command byte, effectively doubling the amount of data the master can receive per clock cycle. In this case the MOSI line becomes Serial I/O 0 (SIO0) and MISO becomes Serial I/O 1 (SIO1), where SIO0 carries the even bits and SIO1 the uneven bits of a response. Quad SPI is an extension of the Dual SPI protocol that adds two new data lines SIO3 and SIO4, and sends 4 data bits per clock cycle.

Both of these extensions are popular for communication with flash components.

Multiple Slaves

On any given SPI bus there may be only one master but there can be as many slaves as needed as long as every slave has its own CS line, allowing the master to toggle on or off any given slave by pulling its CS line low or high respectively.

This is often used for chipset communication with multiple flash components, where the firmware is stored on multiple flash chips.

Enhanced Serial Peripheral Interface (eSPI)

TODO