Files - IEEE-NITK/RDNA2-Compute-Unit GitHub Wiki

• Header files

• defines.vh, vop1.vh, vop2.vh

These are the header files that the project will use to access the various instructions and constants pertaining to the instruction format.

• floats.vh

  This Verilog header file holds constants pertaining to floating-point operations.

• Verilog Files

• float_adder_32.v

  Top module for 32-bit floating-point adder. Its various submodules include -

  • CSA_23b.v

    A carry-save adder is a type of digital adder, used to efficiently compute the sum of three or more binary numbers.

    (Note: name subject to change)

  • fulladder.v

    The full adder is a digital component that performs three numbers an implemented using the logic gates. It is the main component inside an ALU of a processor and is used to increment addresses, table indices, buffer pointers, and other places where addition is required.

    A one-bit full adder adds three one-bit binary numbers, two input bits, one carry bit, and outputs a sum and a carry bit.

  • FullSubtractor.v

    A full subtractor is a combinational circuit that performs the subtraction of three bits. It consists of three inputs and two outputs.

  • HalfSubtractor.v

    Half Subtractor is a combinational logic circuit. It is used for the purpose of subtracting two single bit numbers. It contains 2 inputs and 2 outputs (difference and borrow).

  • mux21.v

    This is a 2x1 mux.

  • RightShifter.v

    A 24 bit barrel-shifter.

  • subtractor_8bit.v

    8-bit subtractor for finding the difference in exponents.