Chapter 15 - Hongjayeong-02/Basic_SoC_implementation GitHub Wiki
STM32F439ZI์ RTC peripheral์ LSI clock์ผ๋ก ๋์์ํค๊ณ , ํ์ฌ ์๊ฐ๊ณผ ๋ ์ง๋ฅผ UART๋ก ์ถ๋ ฅํ๋ค.
์ด๋ฒ ์ค์ต:
LSI
โ
RTC Clock
โ
Prescaler
โ
1 Hz Calendar Clock
โ
RTC Time / Date
โ
UART
โ
PC Terminal
์ค์ board์์ ๋ค์๊น์ง ํ์ธํ๋ค.
Time count : PASS
1-second tick : PASS
Date rollover : PASS
09-19
โ
09-20
Ch09 TIM2:
System / Peripheral Clock
โ
Timer Counter
โ
Periodic Event
RTC:
Low-Speed Clock
โ
Backup Domain
โ
Calendar Hardware
โ
Second / Minute / Hour
Day / Month / Year
RTC๋ ๋จ์ counter๊ฐ ์๋๋ผ ์๊ฐ๊ณผ ๋ ์ง๋ฅผ ๊ด๋ฆฌํ๋ calendar peripheral์ด๋ค.
RTC๋ ์ผ๋ฐ peripheral๊ณผ ๋ฌ๋ฆฌ Backup Domain์ ์กด์ฌํ๋ค.
๋ฐ๋ผ์ ๋ฐ๋ก register๋ฅผ ์์ ํ ์ ์๋ค.
๋จผ์ :
PWR Clock Enable
โ
DBP = 1
โ
Backup Domain Write Access
์์๊ฐ ํ์ํ๋ค.
ํต์ฌ:
RCC->APB1ENR |= PWREN;
PWR->CR |= CR_DBP;RTC๋ ์ฌ๋ฌ clock source๋ฅผ ์ฌ์ฉํ ์ ์๋ค.
LSE
โ External 32.768 kHz crystal
LSI
โ Internal low-speed RC oscillator
HSE
โ External high-speed clock division
์ด๋ฒ ์ค์ต์์๋:
LSI
๋ฅผ ์ฌ์ฉํ๋ค.
์ฅ์ :
External crystal ๋ถํ์
๋ฐฐ์ ๋ถํ์
๊ฐ๋จํ ์ค์ต์ ์ ํฉ
๋จ์ :
LSE๋ณด๋ค ์ ํ๋๊ฐ ๋ฎ์
์ฆ ์ค์ ์ ๋ฐ RTC application์์๋ ๋ณดํต LSE๊ฐ ๋ ์ ํฉํ๋ค.
์ด๋ฒ ์ค์ต์ ์ค์ :
LSI โ 32 kHz
โ
Asynchronous Prescaler
โ
Synchronous Prescaler
โ
โ 1 Hz
โ
Calendar
์ฌ์ฉ๊ฐ:
RTC_ASYNCH_PREDIV = 0x7F
= 127
โ divide by 128
RTC_SYNCH_PREDIV = 0x00F9
= 249
โ divide by 250
๋ฐ๋ผ์:
128 ร 250
=
32000
LSI๊ฐ ์ฝ 32kHz๋ผ๋ ๊ฐ์ ์ ๋ง์ถ ์ค์ ์ด๋ค.
| Register | ์ญํ |
|---|---|
| RTC->TR | Hour / Minute / Second |
| RTC->DR | Year / Month / Day / Weekday |
| RTC->CR | RTC control / format |
| RTC->ISR | Initialization / synchronization status |
| RTC->PRER | Async / Sync prescaler |
| RTC->WPR | Write protection |
| RCC->CSR | LSI enable / ready |
| RCC->BDCR | RTC clock select / RTC enable |
| PWR->CR | Backup domain write access |
RTC์ ์๊ฐ๊ณผ ๋ ์ง๋ ์ผ๋ฐ binary integer๊ฐ ์๋๋ผ BCD ํํ๋ก ์ ์ฅ๋๋ค.
์:
Decimal 59
์ผ๋ฐ binary:
0x3B
BCD:
0x59
BCD์์๋ ๊ฐ decimal digit์ 4bit์ฉ ์ ์ฅํ๋ค.
5 โ 0101
9 โ 1001
59
โ 0101 1001
โ 0x59
๋ฐ๋ผ์ RTC register์:
0x59
๊ฐ ๋ณด์ด๋ฉด ์ค์ ๊ฐ:
59
๋ก ์ฝ์ ์ ์๋ค.
์๋ณธ ์ค์ต ์ฝ๋:
uint8_t rtc_convert_bcd2dec(uint8_t value)
{
return (uint8_t)(((value >> 4U) * 10U)
+ (value & 0x0FU));
}์:
value = 0x59
์์ nibble:
0x5 ร 10
=
50
ํ์ nibble:
0x9
=
9
๊ฒฐ๊ณผ:
50 + 9
=
59
RTC ์ฃผ์ register๋ ์ค์๋ก ๋ณ๊ฒฝ๋๋ ๊ฒ์ ๋ฐฉ์งํ๊ธฐ ์ํด write protection์ด ๊ฑธ๋ ค ์๋ค.
Unlock sequence:
RTC->WPR = 0xCA;
RTC->WPR = 0x53;์์๊ฐ ์ค์ํ๋ค.
0xCA
โ
0x53
โ
RTC Write Protection Disabled
์ค์ ์ด ๋๋ ํ:
RTC->WPR = 0xFF;๋ก write protection์ ๋ค์ ํ์ฑํํ๋ค.
ํ์ฌ Notion์ ์ ์ฒด๊ฐ ๋ช ํํ ๋จ์ ์๋ ํต์ฌ:
rtc_init()
rtc_convert_bcd2dec()
main()
๋ค์ helper๋ ํธ์ถ ๊ตฌ์กฐ์ ์ญํ ์ ๋จ์ ์์ง๋ง ์ ์ฒด ํจ์ ๋ณธ๋ฌธ์ ํ์ฌ ๊ธฐ๋ก์ ๋ณด์กด๋์ด ์์ง ์๋ค.
rtc_init_seq()
exit_init_seq()
rtc_date_config()
rtc_time_config()
rtc_set_asynch_prescaler()
rtc_set_synch_prescaler()
display_rtc_calendar()
๋ฐ๋ผ์ ์๋ ์๋ณธ ์ฝ๋๋ฅผ ์์๋ก ๋ง๋ค์ด ๋ฃ์ง๋ ์๋๋ค.
#ifndef RTC_H__
#define RTC_H__
#include <stdint.h>
#include "stm32f4xx.h"
/*
* Initialize RTC using the LSI clock.
*/
void rtc_init(void);
/*
* Convert one BCD encoded value
* into normal decimal integer form.
*
* Example:
*
* 0x59 โ 59
*/
uint8_t rtc_convert_bcd2dec(uint8_t value);
/*
* Read RTC time/date registers and
* print current calendar data through UART.
*
* Full archived implementation body
* is not currently available.
*/
void display_rtc_calendar(void);
#endif#include "rtc.h"
/*
* ============================================================
* RCC / PWR Control Bits
* ============================================================
*/
/*
* APB1 PWR peripheral clock enable.
*/
#define PWREN (1U << 28)
/*
* PWR CR DBP:
*
* Enable write access to Backup Domain.
*/
#define CR_DBP (1U << 8)
/*
* RCC CSR LSION:
*
* Enable internal low-speed oscillator.
*/
#define CSR_LSION (1U << 0)
/*
* RCC CSR LSIRDY:
*
* Indicates LSI oscillator is stable.
*/
#define CSR_LSIRDY (1U << 1)
/*
* Backup Domain Reset.
*/
#define BDCR_BDRST (1U << 16)
/*
* RTC Enable.
*/
#define BDCR_RTCEN (1U << 15)
/*
* ============================================================
* RTC Write Protection
* ============================================================
*/
#define RTC_WRITE_PROTECTION_KEY_1 0xCAU
#define RTC_WRITE_PROTECTION_KEY_2 0x53U
/*
* ============================================================
* Prescaler
* ============================================================
*/
#define RTC_ASYNCH_PREDIV 0x7FU
#define RTC_SYNCH_PREDIV 0x00F9Uvoid rtc_init(void)
{
/*
* --------------------------------------------------------
* Step 1. Enable PWR Peripheral Clock
* --------------------------------------------------------
*
* RTC belongs to the Backup Domain.
*
* Backup-domain write permission is controlled
* through the PWR peripheral.
*/
RCC->APB1ENR |= PWREN;
/*
* --------------------------------------------------------
* Step 2. Enable Backup Domain Write Access
* --------------------------------------------------------
*
* DBP = Disable Backup-domain Protection.
*
* DBP = 1
*
* allows RTC / backup domain registers
* to be modified.
*/
PWR->CR |= CR_DBP;
/*
* --------------------------------------------------------
* Step 3. Enable LSI
* --------------------------------------------------------
*
* LSI:
*
* Low-Speed Internal RC oscillator
*
* Used as the RTC source in this project.
*/
RCC->CSR |= CSR_LSION;
/*
* --------------------------------------------------------
* Step 4. Wait Until LSI Is Stable
* --------------------------------------------------------
*
* LSIRDY = 1
*
* means the LSI oscillator is ready.
*
* RTC clock should not be configured until
* the selected source clock is stable.
*/
while ((RCC->CSR & CSR_LSIRDY) != CSR_LSIRDY)
{
}
/*
* --------------------------------------------------------
* Step 5. Reset Backup Domain
* --------------------------------------------------------
*
* BDRST = 1
*
* resets RTC / backup-domain configuration.
*/
RCC->BDCR |= BDCR_BDRST;
/*
* Release reset.
*/
RCC->BDCR &= ~BDCR_BDRST;
/*
* --------------------------------------------------------
* Step 6. Select LSI as RTC Clock
* --------------------------------------------------------
*
* RTCSEL field is configured to:
*
* 10b
*
* for LSI.
*
* Existing code performs this by:
*
* bit8 = 0
* bit9 = 1
*/
RCC->BDCR &= ~(1U << 8);
RCC->BDCR |= (1U << 9);
/*
* --------------------------------------------------------
* Step 7. Enable RTC
* --------------------------------------------------------
*/
RCC->BDCR |= BDCR_RTCEN;
/*
* --------------------------------------------------------
* Step 8. Disable RTC Write Protection
* --------------------------------------------------------
*
* Hardware-defined unlock sequence:
*
* 0xCA
* โ
* 0x53
*/
RTC->WPR = RTC_WRITE_PROTECTION_KEY_1;
RTC->WPR = RTC_WRITE_PROTECTION_KEY_2;
/*
* --------------------------------------------------------
* Step 9. Enter RTC Initialization Mode
* --------------------------------------------------------
*
* RTC calendar registers must be configured
* while the RTC is in initialization mode.
*
* Full helper body is not preserved
* in the current archive.
*/
rtc_init_seq();
/*
* --------------------------------------------------------
* Step 10. Configure Date
* --------------------------------------------------------
*
* Existing practice value:
*
* Weekday : Friday
* Date : 19
* Month : 09
* Year : 26
*
* Values are BCD encoded.
*/
rtc_date_config(
WEEKDAY_FRIDAY,
0x19,
0x09,
0x26
);
/*
* --------------------------------------------------------
* Step 11. Configure Time
* --------------------------------------------------------
*
* Existing practice:
*
* 11:59:55 PM
*
* Starting close to midnight allows
* date rollover to be tested quickly.
*/
rtc_time_config(
TIME_FORMAT_PM,
0x11,
0x59,
0x55
);
/*
* --------------------------------------------------------
* Step 12. RTC Time Format
* --------------------------------------------------------
*
* IMPORTANT:
*
* The archived Notion source contains:
*
* RTC->CR |= CR_FMT;
*
* together with the comment "24-hour format".
*
* However the same source calls:
*
* TIME_FORMAT_PM
*
* so the archived notes are internally inconsistent
* regarding 12-hour / 24-hour format.
*
* Keep this as a re-test item and verify CR.FMT
* against the STM32F439 RTC Reference Manual
* before finalizing the driver.
*/
RTC->CR |= CR_FMT;
/*
* --------------------------------------------------------
* Step 13. Configure Asynchronous Prescaler
* --------------------------------------------------------
*
* 0x7F = 127
*
* Actual division:
*
* 127 + 1
* = 128
*/
rtc_set_asynch_prescaler(
RTC_ASYNCH_PREDIV
);
/*
* --------------------------------------------------------
* Step 14. Configure Synchronous Prescaler
* --------------------------------------------------------
*
* 0xF9 = 249
*
* Actual division:
*
* 249 + 1
* = 250
*/
rtc_set_synch_prescaler(
RTC_SYNCH_PREDIV
);
/*
* --------------------------------------------------------
* Step 15. Exit Initialization Mode
* --------------------------------------------------------
*
* Calendar counting starts/resumes.
*
* Helper also waits for register synchronization
* in the original experiment flow.
*/
exit_init_seq();
/*
* --------------------------------------------------------
* Step 16. Re-enable RTC Write Protection
* --------------------------------------------------------
*/
RTC->WPR = 0xFF;
}์ด ๊ฐ์ ์์๋ก ๊ณ ๋ฅธ ๊ฒ์ด ์๋๋ผ ๋ ์ง rollover๋ฅผ ๋น ๋ฅด๊ฒ ๊ฒ์ฆํ๊ธฐ ์ํด ์ ๋ฆฌํ test condition์ด๋ค.
11:59:55 PM
โ
11:59:56
โ
11:59:57
โ
11:59:58
โ
11:59:59
โ
12:00:00
๋์์ ๋ ์ง:
09-19
โ
09-20
์ด ๋๋์ง ํ์ธํ ์ ์๋ค.
์ฆ ๋จ์ํ RTC๊ฐ ์ฆ๊ฐํ๋ ๊ฒ๋ฟ ์๋๋ผ:
Second rollover
Minute rollover
Hour rollover
Date rollover
๋ฅผ ํ ๋ฒ์ ๊ฒ์ฆํ ์ ์๋ค.
RTC๋ ๊ณ์ ์๊ฐ์ countํ๊ณ ์๊ธฐ ๋๋ฌธ์ calendar register๋ฅผ ๋์ ์ค์ ์๋ฌด ๋๋ ์์ ํ๋ฉด ์ ๋๋ค.
์ค์ ๊ณผ์ :
Normal RTC Operation
โ
Enter Init Mode
โ
Calendar Counter Paused
โ
Configure
TR / DR / PRER / CR
โ
Exit Init Mode
โ
RTC Counting Starts
์ด ๊ณผ์ ์ helper:
rtc_init_seq()
exit_init_seq()
๊ฐ ๋ด๋นํ๋ค.
Bare-metal peripheral initialization์์๋:
Write configuration
๋ง ํ๊ณ ๋ฐ๋ก ๋ค์ ๋จ๊ณ๋ก ๋์ด๊ฐ๋ฉด ์ ๋๋ ๊ฒฝ์ฐ๊ฐ ๋ง๋ค.
์:
RCC->CSR |= CSR_LSION;
while ((RCC->CSR & CSR_LSIRDY)
!= CSR_LSIRDY)
{
}์ด๋:
LSI Enable
โ
Oscillator starting...
โ
Not Ready
โ
Not Ready
โ
LSIRDY = 1
โ
Continue
๋ผ๋ hardware synchronization ๊ณผ์ ์ด๋ค.
์ด ํจํด์ ์ดํ์๋ ๋ฐ๋ณต๋๋ค.
Enable
โ
Wait Ready Flag
โ
Configure Next Stage
uint8_t rtc_convert_bcd2dec(uint8_t value)
{
/*
* Upper nibble contains the tens digit.
*
* Example:
*
* 0x59 >> 4
* =
* 0x05
*
* 5 ร 10
* =
* 50
*/
uint8_t tens =
(uint8_t)((value >> 4U) * 10U);
/*
* Lower nibble contains the ones digit.
*
* 0x59 & 0x0F
* =
* 9
*/
uint8_t ones =
(uint8_t)(value & 0x0FU);
/*
* 50 + 9 = 59
*/
return (uint8_t)(tens + ones);
}์๋ณธ์ ํ ์ค ํํ:
return (uint8_t)(((value >> 4U) * 10U)
+ (value & 0x0FU));
๊ณผ ๋์ผํ ๋์์ด๋ค.
#include "rtc.h"
#include "uart.h"
#include "systick.h"
int main(void)
{
/*
* --------------------------------------------------------
* Step 1. Initialize UART
* --------------------------------------------------------
*
* Current RTC date/time is printed
* through USART3.
*/
uart_init();
/*
* --------------------------------------------------------
* Step 2. Initialize RTC
* --------------------------------------------------------
*
* RTC setup:
*
* Clock Source โ LSI
* Prescaler
* Date
* Time
*/
rtc_init();
while (1)
{
/*
* ----------------------------------------------------
* Step 3. Read and Display RTC Calendar
* ----------------------------------------------------
*
* Expected information:
*
* Hour
* Minute
* Second
* Month
* Day
* Year
*
* The complete archived implementation of
* display_rtc_calendar() is not currently
* preserved in the source notes.
*/
display_rtc_calendar();
/*
* ----------------------------------------------------
* Step 4. Print Approximately Once Per Second
* ----------------------------------------------------
*
* SysTick driver from Ch08 is reused.
*/
systick_msec_delay(1000);
}
}rtc_init()
โ
โโโ PWR Clock Enable
โ
โโโ DBP = 1
โ
โโโ LSI Enable
โ
โโโ Wait LSIRDY
โ
โโโ Backup Domain Reset
โ
โโโ RTCSEL = LSI
โ
โโโ RTC Enable
โ
โโโ WPR Unlock
โ
โโโ Enter Init Mode
โ
โโโ Date Configure
โ
โโโ Time Configure
โ
โโโ Prescaler Configure
โ
โโโ Exit Init Mode
โ
โโโ WPR Lock
LSI
โ
RTC Prescaler
โ
1-second Calendar Tick
โ
TR / DR Update
โ
display_rtc_calendar()
โ
BCD โ Decimal
โ
UART
โ
PC Terminal
RTC time register stores:
Hours
Minutes
Seconds
๊ฐ๋ ์ ์ผ๋ก:
TR
โโโโโโโโโโฌโโโโโโโโโโฌโโโโโโโโโโ
โ Hour โ Minute โ Second โ
โโโโโโโโโโดโโโโโโโโโโดโโโโโโโโโโ
๊ฐ field๋ BCD encoded value๋ค.
์:
11:59:55
์ด๋ฉด register field๋ค์ ์ฌ๋์ด hex๋ก ๋ดค์ ๋:
11
59
55
์ฒ๋ผ ์ฝ๊ธฐ ์ฝ๋ค.
RTC date register์๋:
Year
Month
Date
Weekday
์ ๋ณด๊ฐ ์ ์ฅ๋๋ค.
์ด๋ฒ ์ด๊ธฐ๊ฐ:
Year = 0x26
Month = 0x09
Date = 0x19
Weekday = Friday
์์ ์ด ์ง๋๋ฉด hardware calendar๊ฐ ์๋์ผ๋ก:
09-19
โ
09-20
์ผ๋ก ์ฆ๊ฐ์ํจ๋ค.
RTC register read๋ ๋ด๋ถ shadow register์ ๊ด๋ จ๋ synchronization์ด ์กด์ฌํ๋ค.
๊ธฐ์กด ์ค์ต์์ reset ์งํ ์๊ฐ์ ์ผ๋ก:
01-01-2000
์ฒ๋ผ ์ด๊ธฐ๊ฐ์ด ํ์๋ ์ ์๋ค๋ ๊ธฐ๋ก์ด ์์๋ค.
๊ทธ ํ RTC register synchronization์ด ๋๋๋ฉด ์ค์ ์ค์ ํ calendar ๊ฐ์ด ํ์๋๋ค.
๋ฐ๋ผ์ reset ์งํ ํ ๋ฒ์ ์๋ชป๋ ํ๋ฉด๋ง ๋ณด๊ณ :
RTC initialization failed
๋ผ๊ณ ๋ฐ๋ก ํ๋จํ๋ฉด ์ ๋๋ค.
ํ์ฌ ๋ณด์กด๋ ์ค์ต ์ฝ๋์๋:
rtc_time_config(
TIME_FORMAT_PM,
0x11,
0x59,
0x55
);
RTC->CR |= CR_FMT;๊ฐ ์๊ณ , ๊ธฐ์กด ์ฃผ์์:
24์๊ฐ์
๋ผ๊ณ ๋์ด ์๋ค.
ํ์ง๋ง:
TIME_FORMAT_PM
์ด๋ผ๋ ์ค์ ๊ณผ ๊ฐ์ ์ฝ๋ ์์ ์กด์ฌํ๋ฏ๋ก 12/24-hour format์ ๋ํ ๊ธฐ๋ก์ด ๋ด๋ถ์ ์ผ๋ก ์ผ๊ด๋์ง ์๋๋ค.
๋ฐ๋ผ์ ์ฌ์ค์ต ์ ๋ฐ๋์:
STM32F439 RTC CR.FMT definition
์ Reference Manual์์ ๋ค์ ํ์ธํ๊ณ ์ต์ข ์ฝ๋์:
FMT
AM/PM
Hour encoding
์ ์ผ์น์ํจ๋ค.
์ด ๋ถ๋ถ์ ํ์ฌ Wiki์์ โ๊ฒ์ฆ ํ์โ ํญ๋ชฉ์ผ๋ก ๋จ๊ธด๋ค.
๊ธฐ์กด ์ค์ต:
Build : PASS
Download : PASS
Run : PASS
Program size:
text = 2260 bytes
data = 0 bytes
bss = 2560 bytes
๊ฒฝ๊ณ ์์ด build ์๋ฃ.
์ค์ terminal์์:
Second
โ
Second
โ
Second
๊ฐ ์ฝ 1์ด์ฉ ์ฆ๊ฐํ๋ ๊ฒ์ ํ์ธํ๋ค.
๋ํ:
09-19
11:59:59 PM
์ดํ:
09-20
12:00:00
์ผ๋ก ๋ ์ง๊ฐ ๋์ด๊ฐ๋ ๊ฒ์ ํ์ธํ๋ค.
์ฆ:
Second increment PASS
Minute rollover PASS
Hour rollover PASS
Date rollover PASS
๋ก ๋ณผ ์ ์๋ค.
make clean
makeExpected:
text = 2260
data = 0
bss = 2560
Debugger:
RCC->CSR
ํ์ธ:
LSION = 1
LSIRDY = 1
ํ์ธ:
PWR->CR
Expected:
DBP = 1
initialization ์ค backup domain access๊ฐ ํ์ฉ๋์๋์ง ํ์ธํ๋ค.
ํ์ธ:
RCC->BDCR
ํ์ธํ ํญ๋ชฉ:
RTCSEL
RTCEN
Expected:
RTC Clock Source = LSI
RTC Enable = 1
ํ์ธ:
RTC->PRER
Expected:
Asynchronous = 0x7F
Synchronous = 0x00F9
Watch:
RTC->TR
์ด๊ฐ ์ฆ๊ฐํ๋์ง ํ์ธํ๋ค.
55
56
57
58
59
00
์์ ์ :
RTC->DR
โ 09-19
์์ ํ:
RTC->DR
โ 09-20
์ธ์ง ํ์ธํ๋ค.
images/ch15_build.png
images/ch15_lsi.png
images/ch15_rtc_registers.png
images/ch15_time_before_midnight.png
images/ch15_time_after_midnight.png
images/ch15_rollover_terminal.png
๊ฐ์ฅ ์ค์ํ evidence:
11:59:59 / 09-19
โ
12:00:00 / 09-20
terminal ํ๋ฉด์ด๋ค.
์ด ํ ์ฅ์ด:
RTC counting
+
Time rollover
+
Calendar rollover
๋ฅผ ๋์์ ๋ณด์ฌ์ค๋ค.
LSI
โ
Backup Domain
โ
RTC
โ
Prescaler
โ
Calendar
โ
BCD Time / Date
โ
UART
- RTC๋ ์ผ๋ฐ timer์ ๋ฌ๋ฆฌ calendar hardware๋ค.
- RTC๋ Backup Domain์ ์กด์ฌํ๋ค.
- RTC register๋ฅผ ์์ ํ๋ ค๋ฉด
DBP๋ก backup domain write access๋ฅผ ํ์ฉํด์ผ ํ๋ค. - ์ด๋ฒ ์ค์ต์ LSI๋ฅผ RTC clock source๋ก ์ฌ์ฉํ๋ค.
- LSI๋ฅผ enableํ ํ
LSIRDY๋ฅผ ๊ธฐ๋ค๋ฆฐ๋ค. - RTC register write ์
0xCA โ 0x53key sequence๋ก write protection์ ํด์ ํ๋ค. - RTC ์ค์ ์ initialization mode์์ ์ํํ๋ค.
-
TR์ time,DR์ date๋ฅผ ์ ์ฅํ๋ค. - RTC ๊ฐ์ BCD ํ์์ผ๋ก ์ ์ฅ๋๋ค.
-
0x59BCD๋ decimal59๋ฅผ ์๋ฏธํ๋ค. - Prescaler๋
0x7F / 0x00F9์ค์ ์ ์ฌ์ฉํ๋ค. - ์ค์ board์์ 1์ด ์ฆ๊ฐ์ 09-19 โ 09-20 ๋ ์ง rollover๋ฅผ ๊ฒ์ฆ ์๋ฃํ๋ค.
- ๊ธฐ์กด ๊ธฐ๋ก์
CR.FMT์TIME_FORMAT_PM์กฐํฉ์ ์ฌ์ค์ต ์ ๋ค์ ํ์ธํด์ผ ํ๋ค.