opcodes - HenryLoenwind/4bit GitHub Wiki

General

Parameters

All Opcodes have exactly one 4-bit parameter. Depending on the opcode that parameter either is a verbatim value (notation: NXT) or a register (notation R__).

Notation

  • NXT: The direct parameter of the opcode as a verbatim value.
  • R__: The direct parameter of the opcode as a register reference.
  • A ° B: An operation involving A and B.
  • A => B: A is read and B is written to by this opcode.
  • A, B: List of A and B
  • A+B: A and B are added to each other.

Opcodes

There are 16 opcodes:

0: ret NXT

Ends the program execution and returns NXT. This operation is final, the program cannot be resumed. All registers and the data memory are lost.

1: add ACC ° R__ => ACC, STS

Adds ACC and the parameter register, stores the result in ACC. Sets the STS bits according to the result.

2: sub ACC ° R__ => ACC, STS

Subtracts the parameter register from ACC and stores the result in ACC. Sets the STS bits according to the result.

3: mul ACC ° R__ => ACC, STS

Multiplies ACC and the parameter register, stores the result in ACC. Sets the STS bits according to the result.

4: div ACC ° R__ => ACC, STS

Divides ACC by the parameter register, stores the result in ACC. Sets the STS bits according to the result.

5: and ACC ° R__ => ACC, STS

Computes a bitwise AND between ACC and the parameter register, stores the result in ACC. Sets the STS bits according to the result.

6: orr ACC ° R__ => ACC, STS

Computes a bitwise OR between ACC and the parameter register, stores the result in ACC. Sets the STS bits according to the result.

7: xor ACC ° R__ => ACC, STS

Computes a bitwise XOR between ACC and the parameter register, stores the result in ACC. Sets the STS bits according to the result.

8: cmp ACC ° R__ => STS

Compares ACC and the parameter register, stores the result in ACC. Sets the STS bits accordingly. (Note: The ZERO bit is set according to the ACC value, independent of the parameter register.)

9: ldn NXT => LOS, STS

Loads NXT into the LOS register (LOS==ACC by default). Sets the STS bits according to the loaded value.

(ldn = LoaD Nxt)

A: ldm ADR+NXT => LOS, STS

Loads the value from the address ADR+NXT in the data memory into the LOS register (LOS==ACC by default). Sets the STS bits according to the loaded value.

(ldm = LoaD Memory)

B: sto LOS => ADR+NXT

Stores the value of the LOS register (LOS==ACC by default) into the address ADR+NXT in the data memory.

(sto = STOre)

C: mvr R__ => ACC, STS

Copies the value of the parameter register into ACC. Sets the STS bits according to the copied value.

(mvr = MoVe Register)

D: mva ACC => R__, STS

Copies the value of ACC into the parameter register. Sets the STS bits according to the copied value.

(mva = MoVe Acc)

E: jmp NXT ° STS : ADR => IP

Executes a bitwise AND between NXT and STS. If the result is not zero, sets the instruction pointer to ADR.

Note: "jmp 0" is a NOP. "zro STS; jmp 15" is an unconditional jump.

F: zro R__

Sets the parameter register to 0. Sets the STS bits according to the new value.

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