MSX Technical Overview - FujiNetWIFI/fujinet-firmware GitHub Wiki

FujiNet for MSX Technical Overview

Components

Unlike prior serial-based FujiNets, on the MSX we connect directly to the data bus through the cartridge slot. This Data Bus Controller (DBC) is implemented with an RP2350B, with GPIOs connected to address lines, data lines, and a few other signals.

The DBC handles ROM emulation as well as communicating with the ESP32-based FujiNet Core via USB serial. In emulation, the DBC is implemented as an openMSX extension, and can communicate over TCP with a software FujiNet running on your computer.

Physical Configuration (Planned)

      Host                 DBC               FN Core
                   ,---------------------------------,
  MSX Computer <---|---> RP2350B  <------->  ESP32   |
                   `---------------------------------'
                             FujiNet Cartridge  

See: fujinet-hardware

Physical Configuration (Prototype)

      Host                 DBC               FN Core
                   
  MSX Computer <-------> RP2350B <-------> FujiNet-LWM
                                            
                                    USB        PC

See: fujinet-hardware

Emulated Configuration

       Host                DBC               FN Core
,--------------------------------------,
| Emulated MSX <-> FujiNet Extension <-|-> FujiNet-LWM
`--------------------------------------' 
               openMSX                TCP      PC

See: Run-FujiNet-with-OpenMSX

I/O

The DBC handles memory-based I/O. There are 4 bytes reserved at the top of page 2 (0xBFFC-0xBFFF), which can be used to read and write data.

Serial Protocol

We use a SLIP-inspired protocol for sending and receiving command and data: https://github.com/FujiNetWIFI/fujinet-firmware/wiki/FEP-004

ROM Emulation

RAM Expansion

MSX BASIC Extensions

Disk Routines

MSX-DOS

Sound Chip Emulation

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