#74LS256

Description: dual 4-bit addressable latch

Datasheet: https://alfter.us/wp-content/uploads/2022/12/74LS256.pdf

Pinout:

       +-----------+
    A0 |[ 1]   [16]| VCC
    A1 |[ 2]   [15]| ~{CL}
    DA |[ 3]   [14]| ~{E}
Q_{0A} |[ 4]   [13]| DB
Q_{1A} |[ 5]   [12]| Q_{3B}
Q_{2A} |[ 6]   [11]| Q_{2B}
Q_{3A} |[ 7]   [10]| Q_{1B}
   GND |[ 8]    [9]| Q_{0B}
       +-----------+