74LS165 - FBEZ/Pinout-AsciiArt GitHub Wiki

#74LS165

Description: Shift Register 8-bit, parallel load

Datasheet: https://www.ti.com/lit/ds/symlink/sn74ls165a.pdf

Pinout:

      +-----------+
~{PL} |[ 1]   [16]| VCC
   CP |[ 2]   [15]| ~{CE}
   D4 |[ 3]   [14]| D3
   D5 |[ 4]   [13]| D2
   D6 |[ 5]   [12]| D1
   D7 |[ 6]   [11]| D0
~{Q7} |[ 7]   [10]| DS
  GND |[ 8]    [9]| Q7
      +-----------+