vivado build help - ComPair/ComPair-tracker-FPGA GitHub Wiki
Vivado Build Help
This is a place to place useful notes for how to build our Vivado project. Hopefully these tips become less and less necessary as the build process is cleaned up
Exporting the block diagram
Use the Makefile:
make save_bd
Using Vivado:
How to create zynq_bd.tcl
, which is version controlled and generated by Vivado.
From the main menu bar, select:
File -> Export -> Export Block Design.
This will create work/zynq/zynq_bd.tcl (by default). The generated file should be copied to src/breakout/zynq_bd.tcl, and then committed.
Setting the board part
If changes need to be made to our main IP, and you do "Edit in IP Packager", you could end up getting an error about board part not being defined. To fix this, on Vivado's tcl command line, set PROJECT_BASE
and run:
set_param board.repoPaths $PROJECT_BASE/board_files/
Installing cable drivers
I've had to do this a couple of times now, and this page is sort of relevant.
sudo Vivado/2018.3/data/xicom/cable_drivers/lin64/install_script/install_drivers/install_drivers