Sync'd Vata Distribution IP

This is an IP core that sends out signals synchronously to all VATA ASIC IP instances.

Distributed signals

• Global counter
• Global counter reset
• Force trigger
• Concatenated hit data from each VATA.
• Sends out signals to TM

AXI register allocation

• Reg0: Write. control register
• Reg1-Reg2: Read. Global counter value
• Reg3(11 downto 0): Write. Bitwise mask to disable a given asic's hits. Every '1' bit suppresses an asic from both generating hits and from contributing to the FEE_busy signal.
• Reg4(0): Write. Global "hit enable". When '0', all hits are suppressed.

Control register actions

Writing the following to reg0 will do the following:

• 0 => reset global counter
• 1 => force trigger all asic's