Drawing System Diagrams - CMU-18240/240-How-to GitHub Wiki
Above is an example of what we expect from a system diagram in this lab. We expect:
- Module and submodule names specified
- Submodule port names specified
- Wire bit widths specified
- Hierarchical structure is clear just from the diagram
- Descriptions such that we will be able to know how your circuit works just from looking at the diagram
You are allowed to:
- Split up multi-bit wires into multiple lines
- If you want to get only certain bit positions of a multi-bit wire, there is no need to mess with shifting and masking away bits.
- Combine wires into multi-bit wires
- Connect wires by label
Please make sure to adhere to these standards as we will stick to these same guidelines for future labs and exams.