Inputs

• clock: Clock
• wren: Write enable
• write_B[7..0]: B write port
• addr_A[3..0]: A address
• addr_B[3..0]: B address

Outputs

• read_A[7..0]: A read port
• read_B[7..0]: B read port

Behavior

Write on negative clock flank when wren is high (synchronously). Read instantaneously on address (asynchronously).