DataStorm DAQ (TEI0022) CC fmc pinout - ArrowElectronics/data-storm-daq GitHub Wiki
This board has a single LPC FMC Connector.

FMC Pin | FPGA Ball | Signal Name | FMC Pin | FPGA Ball | Signal Name | |
---|---|---|---|---|---|---|
C1 | GND | D1 | FMC_PG_C2M | |||
C2 | DP0_C2M_P | D2 | GND | |||
C3 | DP0_C2M_N | D3 | GND | |||
C4 | GND | D4 | GBTCLK0_M2C_P | |||
C5 | GND | D5 | GBTCLK0_M2C_N | |||
C6 | DP0_M2C_P | D6 | GND | |||
C7 | DP0_M2C_N | D7 | GND | |||
C8 | GND | D8 | F15 | LA01_CC_P | ||
C9 | GND | D9 | F14 | LA01_CC_N | ||
C10 | C12 | LA06_P | D10 | GND | ||
C11 | B11 | LA06_N | D11 | H13 | LA05_P | |
C12 | GND | D12 | H12 | LA05_N | ||
C13 | GND | D13 | GND | |||
C14 | E8 | LA10_P | D14 | E9 | LA09_P | |
C15 | D7 | LA10_N | D15 | D9 | LA09_N | |
C16 | GND | D16 | GND | |||
C17 | GND | D17 | B6 | LA13_P | ||
C18 | C8 | LA14_P | D18 | B5 | LA13_N | |
C19 | B8 | LA14_N | D19 | GND | ||
C20 | GND | D20 | F13 | LA17_CC_P | ||
C21 | GND | D21 | E13 | LA17_CC_N | ||
C22 | D6 | LA18_CC_P | D22 | GND | ||
C23 | C5 | LA18_CC_N | D23 | G12 | LA23_P | |
C24 | GND | D24 | G11 | LA23_N | ||
C25 | GND | D25 | GND | |||
C26 | G10 | LA27_P | D26 | A4 | LA26_P | |
C27 | F10 | LA27_N | D27 | A3 | LA26_N | |
C28 | GND | D28 | GND | |||
C29 | GND | D29 | M8 | FMC_TCK | ||
C30 | N12 | FMC_SCL | D30 | M9 | FMC_TDI | |
C31 | M13 | FMC_SDA | D31 | M10 | FMC_TDO | |
C32 | GND | D32 | 3.3V_AUX | |||
C33 | GND | D33 | M11 | FMC_TMS | ||
C34 | GND | D34 | M12 | FMC_TRST_L | ||
C35 | 12.0V_FMC | D35 | GND | |||
C36 | GND | D36 | 3.3V_FMC | |||
C37 | 12.0V_FMC | D37 | GND | |||
C38 | GND | D38 | 3.3V_FMC | |||
C39 | 3.3V_FMC | D39 | GND | |||
C40 | GND | D40 | 3.3V_FMC |
FMC Pin | FPGA Ball | Signal Name | FMC Pin | FPGA Ball | Signal Name | |
---|---|---|---|---|---|---|
G1 | GND | H1 | B10 | FMC_VREF_A_M2C | ||
G2 | H15 | CLK1_M2C_P | H2 | J7 | FMC_PRSNT_M2C_L | |
G3 | G15 | CLK1_M2C_N | H3 | GND | ||
G4 | GND | H4 | K14 | CLK0_M2C_P | ||
G5 | GND | H5 | J14 | CLK0_M2C_N | ||
G6 | C13 | LA00_CC_P | H6 | GND | ||
G7 | B12 | LA00_CC_N | H7 | A11 | LA02_P | |
G8 | GND | H8 | A10 | LA02_N | ||
G9 | K12 | LA03_P | H9 | GND | ||
G10 | J12 | LA03_N | H10 | B13 | LA04_P | |
G11 | GND | H11 | A13 | LA04_N | ||
G12 | C10 | LA08_P | H12 | GND | ||
G13 | C9 | LA08_N | H13 | F11 | LA07_P | |
G14 | GND | H14 | E11 | LA07_N | ||
G15 | A9 | LA12_P | H15 | GND | ||
G16 | A8 | LA12_N | H16 | F9 | LA11_P | |
G17 | GND | H17 | F8 | LA11_N | ||
G18 | C7 | LA16_P | H18 | GND | ||
G19 | B7 | LA16_N | H19 | H14 | LA15_P | |
G20 | GND | H20 | G13 | LA15_N | ||
G21 | A6 | LA20_P | H21 | GND | ||
G22 | A5 | LA20_N | H22 | E12 | LA19_P | |
G23 | GND | H23 | D12 | LA19_N | ||
G24 | D5 | LA22_P | H24 | GND | ||
G25 | C4 | LA22_N | H25 | D11 | LA21_P | |
G26 | GND | H26 | D10 | LA21_N | ||
G27 | H8 | LA25_P | H27 | GND | ||
G28 | G8 | LA25_N | H28 | C3 | LA24_P | |
G29 | GND | H29 | B3 | LA24_N | ||
G30 | J7 | LA29_P | H30 | GND | ||
G31 | H7 | LA29_N | H31 | B2 | LA28_P | |
G32 | GND | H32 | B1 | LA28_N | ||
G33 | J10 | LA31_P | H33 | GND | ||
G34 | J9 | LA31_N | H34 | D2 | LA30_P | |
G35 | GND | H35 | C2 | LA30_N | ||
G36 | K7 | LA33_P | H36 | GND | ||
G37 | K8 | LA33_N | H37 | E1 | LA32_P | |
G38 | GND | H38 | D1 | LA32_N | ||
G39 | FMC_VADJ | H39 | GND | |||
G40 | GND | H40 | FMC_VADJ |

Pmod P1 Pin | Signal Schematic Name | FPGA Pin |
---|---|---|
1 | P0_IO1 | AD9 |
2 | P0_IO2 | AD11 |
3 | P0_IO3 | AD12 |
4 | P0_IO4 | AC12 |
5 | GND | |
6 | 3.3V | |
7 | P0_IO5 | AC9 |
8 | P0_IO6 | AD10 |
9 | P0_IO7 | AA12 |
10 | P0_IO8 | AB12 |
11 | GND | |
12 | 3.3V |
Pmod P2 Pin | Signal Schematic Name | FPGA Pin |
---|---|---|
1 | P1_IO1 | AG2 |
2 | P1_IO2 | AF4 |
3 | P1_IO3 | AF8 |
4 | P1_IO4 | AD7 |
5 | GND | |
6 | 3.3V | |
7 | P1_IO5 | AG1 |
8 | P1_IO6 | AF5 |
9 | P1_IO7 | AE7 |
10 | P1_IO8 | AE9 |
11 | GND | |
12 | 3.3V |
Pmod P3 Pin | Signal Schematic Name | FPGA Pin |
---|---|---|
1 | P2_IO1 | AH5 |
2 | P2_IO2 | AH3 |
3 | P2_IO3 | AJ2 |
4 | P2_IO4 | AG3 |
5 | GND | |
6 | 3.3V | |
7 | P2_IO5 | AG5 |
8 | P2_IO6 | AH4 |
9 | P2_IO7 | AH2 |
10 | P2_IO8 | AJ1 |
11 | GND | |
12 | 3.3V |
Pmod P4 Pin | Signal Schematic Name | FPGA Pin |
---|---|---|
1 | P3_IO1 | AE12 |
2 | P3_IO2 | AF9 |
3 | P3_IO3 | AG8 |
4 | P3_IO4 | AG6 |
5 | GND | |
6 | 3.3V | |
7 | P3_IO5 | AE11 |
8 | P3_IO6 | AF10 |
9 | P3_IO7 | AG7 |
10 | P3_IO8 | AF |
11 | GND | |
12 | 3.3V |
There are 7 SMA connectors on this board. J7, J10, and J18 are assembly options.

SMA Connector | Signal Name | Connected to |
---|---|---|
J7 | SMA_CLK_OUT_p | Clock Generator U3, Pin 22 |
J10 | SMA_CLK_OUT_n | Clock Generator U3, Pin 21 |
J8 | TRIGGER_OUTPUT | Cyclone V U10, Pin AE29 |
J9 | TRIGGER_INPUT | Cyclone V U10, Pin AA26 |
J15 | EXT_CLK_INPUT | Cyclone V U10, Pin Y26 |
J17 | CLK_INPUT | Cyclone V U10, Pin AD29 |
J18 | SMA_CLK_IN | Clock Generator U3, Pin 1 |
The TEI0022 board offers a FAN connector for cooling the FPGA device. Depending on the assembly 5 V or 12 V are usable. By default, it is wired for +12V operation.

Connector | Signal Name | Connected to |
---|---|---|
2-Pin FAN Connector J16, 5 V or 12 V power supply depending on R270/271 with BTS4141N High Side Switch U55 | FAN_EN, (High Side Switch U55, Pin 3) | Intel MAX10 U41, Pin D13 |
According to the JTAGEN and JTAGSEL[1..0] pins the management controller Intel MAX10 (U41), the Intel Cyclone V HPS (U10), the Intel Cyclone V FPGA (U10) or the FMC (J4) can be accessed via the micro USB B connector J13.
JTAGSEL0 | JTAGSEL1 | JTAGEN | Note |
---|---|---|---|
X | X | ON | Intel MAX10 |
ON | ON | OFF | Intel Cyclone V HPS |
ON | OFF | OFF | Intel Cyclone V FPGA |
OFF | ON | OFF | FMC |

A UART connection between the USB B connector J5 and the Intel Cyclone HPS U10 is possible via the FT234XD (U30) chip.
On the TEI0022 board there are up to four USB 2.0 Hi-Speed ports available (J2, J12).
The TEI0022 provides an HDMI Connector J11.
SD Card connector J3 is connected to the Intel Cyclone V U10.
The board TEI0022 provides an ethernet interface via the RJ45 connector J1.
The TEI0022 provides two independent I2C busses. One bus is used to connect the FMC I2C with the Intel Cyclone V HPS. The second bus is used to connect the HDMI device and other on-board I2C device to the Intel Cyclone V FPGA.
Bus | I2C Device | Designator | I2C Address | Schematic Names of I2C Bus Lines | Notes |
---|---|---|---|---|---|
HPS I2C1 | Temperature Sensor | U16 | 0x4A | HPS_I2C0_SCL/HPS_I2C0_SDA | 3.3V Ref. Voltage |
HPS I2C1 | Programmable Clock Generator | U3 | 0x70 | HPS_I2C0_SCL/HPS_I2C0_SDA | 3.3V Ref. Voltage |
HPS I2C1 | EEPROM | U38 | 0x50 | HPS_I2C0_SCL/HPS_I2C0_SDA | 3.3V Ref. Voltage |
HPS I2C1 | HDMI | U23 | 0x72 | HPS_I2C0_SCL/HPS_I2C0_SDA | 3.3V Ref. Voltage |
HPS I2C0 | FMC | J4 | 0x50 | HPS_I2C1_SCL/HPS_I2C1_SDA | 3.3V Ref. Voltage |
