AD7768 Platform Board Architecture - ArrowElectronics/data-storm-daq GitHub Wiki

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DataStorm DAQ (Trenz Cyclone-V SoC Development Kit (TEI0022))

Analog Devices EVAL-AD7768FMCZ Development Board


The AD7768 Platform uses 2 boards. The Cyclone-V SoC Development Kit, and the EVAL-AD7768FMCZ board connects via an FMC interface.



The DataStorm DAQ is based on the Intel Cyclone V SoC FPGA. It features, 1GB DDR3 each for the HPS and FPGA, 32MB QSPI memory each for the HPS and FPGA, Ethernet, and Power. For details, visit the Trenz Electronics Technical Reference Manual Wiki page.

The major components of the DataStorm DAQ are identified by numbers:

Intel Cyclone-V SoC

  • SE Processor:
    • Single or Dual ARM Cortex® A9 MPU
    • Up to 925 MHz max clock speed
    • 32KB L1 Program Cache (per core)
    • 32KB L1 Data Cache (per core)
    • 512 KB L2 Cache (shared)
    • 181 HPS I/O pins
    • 1 Hard Memory Controller (LPDDR2, DDR2, DDR3)
  • FPGA Fabric:
    • Up to 110K Logic Elements (LE)
    • Up to 5.5Mb M10K Memory
    • Up to 621Kb MLAB Memory
    • Up To 112 Variable Precision DSP blocks
    • Up to 224 18x18 multipliers
    • Up to 288 User FPGA I/O pins
    • 1 Hard Memory Controller (LPDDR2, DDR2, DDR3)

FPGA DDR3
HPS DDR3
FMC LPC Connector
PMOD x4
microSD Card Connector
Ethernet PHY
RJ-45 Ethernet Connector
USB PHY
USB HUB
dual USB-A Connector
HDMI Transmitter
HDMI Connector
Intel MAX10
micro-USB to UART Connector for HPS Console
USB to JTAG and UART FTDI Bridge
micro-USB to JTAG and UART Connector for FPGA
SMA Connector
Push Button
LED
4-bit DIP Switch
12 VDC Power Jack
Clock Generator
Programmable Clock Generator
QSPI for HPS
QSPI for FPGA
Temperature Sensor
EEPROM





The EVAL-AD7768FMCZ evaluation kit features the AD7768 24-bit, 256 kSPS, analog-to-digital converter (ADC). A 7V to 9V external bench top supply is regulated to 5V and 3.3V to supply the AD7768 and support components.

The EVAL-AD7768FMCZ is an evaluation board that allows the user to evaluate the features of the ADC.

Full specifications on the AD7768 are available in the product data sheet, which should be consulted in conjunction with this user guide when working with the evaluation board.

Full descriptions of these products are available in their respective data sheets, which must be consulted when using the corresponding evaluation board.



AD7768® - Precision simultaneous 8-ch 24-bit Sigma-Delta ADC
ADA4896-2 - Low Power Rail-to-Rail Output Amplifier for A7 input
ADA4896-2 - Low Power Rail-to-Rail Output Amplifier for A6 input
ADA4896-2 - Low Power Rail-to-Rail Output Amplifier for A5 input
ADA4896-2 - Low Power Rail-to-Rail Output Amplifier for A4 input
ADA4896-2 - Low Power Rail-to-Rail Output Amplifier for A0 input
ADA4896-2 - Low Power Rail-to-Rail Output Amplifier for A1 input
ADA4896-2 - Low Power Rail-to-Rail Output Amplifier for A2 input
ADA4896-2 - Low Power Rail-to-Rail Output Amplifier for A3 input
Power Supply Circuit
Precision Voltage Reference Circuit
EEPROM

Analog Devices AD7768 Block Diagram

The block diagram of the EVAL-AD7768FMCZ® Eval board (below) shows the major components. Each analog input has the option of using the ADA4896-2 amplifier with a gain of 1 or bypassing it using jumpers. conversion results from the AD7768 are communicated to the FPGA via the FMC-LPC connector using 8 source synchronous serial streams. There is also an SPI interface for Control functions.

The EVAL-AD7768FMCZ evaluation kit features the AD7768 24-bit, 256 kSPS, analog-to-digital converter (ADC). It incorporates the ADA4896-2 rail-to-rail output amplifier with Gain=1 to buffer the input signals before applying them to the ADC inputs. The AD7768 expects the input signals to swing between AVSS and AVDD1. However, the EVAL-AD7768FMCZ board is set up to use the ADA4896 buffers which offset the inputs by VCOM. VCOM starts out as an output from the AD7768 (VCM_OUT) at (AVDD1-AVSS)/2 and goes through select jumpers (0 ohm resistors) SL19 and SL15, and unity gain voltage follower as seen below. This means that the user is expected to provide a true differential input centered at AVSS, and the VCOM takes care of shifting it up.

By default, SL19 and SL15 are set to position A.


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