create u boot for the custom board - ArrowElectronics/arrow-soc-workshops GitHub Wiki

Table of Contents

  1. Typical HPS Boot Flow
  2. HPS customization and u-boot
  3. Source code file structure for u-boot
  4. Review custom u-boot recipe
  5. Generate u-boot Custom Board source code based on the Quartus Handoff folder

Typical HPS Boot Flow

Complex application class processors, such as the Cortex-A9 found in the Cyclone V SoC FPGA, require a bootloader to boot from reset.

The HPS boot flow includes the following stages:

  1. Boot ROM
  2. Preloader
  3. U-Boot
  4. Linux
  5. Application



The following table presents a short description of the different boot stages:

Stage Description
Boot ROM Performs minimal configuration and loads Preloader into 64KB OCRAM
Preloader Configures clocks, IO, pinmuxing, brings up SDRAM and loads U-Boot into SDRAM
U-Boot Configures FPGA, loads Linux kernel
Linux Operating system
Application User application

For more information, please refer to HPS SoC Boot Guide - Cyclone V SoC Development Kit and Cyclone V Hard Processor System Technical Reference Manual (Booting and Configuration chapter).

HPS customization and u-boot

ARM processors most commonly use u-boot as the bootloader of choice. u-boot is an open source bootloader and is available on github. The current version of u-boot includes the Preloader stage described in the section above.

The SoC FPGA HPS section is customized based on Platform Designer selections. This was described in the section Creating Processor System in the Custom SoC FPGA Workshop.

The section described below is derived from the Rocketboards Building Bootloader page

Quartus creates a hps_isw_handoff folder during compilation. This folder includes the HPS customization information that u-boot requires in order to build a bootloader for the custom board. These include

  • HPS Peripheral selections and pin muxing
  • HPS clock settings
  • SDRAM selections

For Cyclone V SoC and Arria V SoC, the handoff information created by Quartus compilation comes in several formats: C source code, XML and binary files. bsp-editor takes this information and turns it into source code which is used to build u-boot. qts_filter, in turn, takes the handoff information and the output of bsp-editor and creates board specific c source code for u-boot.

The diagram below shows the typical u-boot build flow for Cyclone V SoC FPGAs. A later section will describe how to use the bsp-editor and qts_filter to create the two Source Code flow blocks. The rest of the u-boot build will be done by yocto using recipes created for this purpose.

Source code file structure for u-boot

It is useful to examine the file structure of u-boot. The reader will see which sections must be modified in order to add a new custom board. The following image shows the general directory structure of u-boot source code



There are five sections of u-boot that need additions or modifications in order to support a new custom board. The snapshots below use the pre-installed sockit board as an example.

  1. board folder
  2. arch/arm/dts folder
  3. configs folder
  4. include/configs folder
  5. arch/arm/mach-socfpga folder

board folder


The qts sub folder contains the four source code files generated by the qts_filter utility based on the Quartus handoff folder files and bsp-editor utility output files. The MAINTAINERS file is edited to be specific for this board and references maintained files that customize u-boot. The Yocto u-boot recipe for the custom board will need to create a new custom board folder and populate it with the appropriate files.

arch/arm/dts folder



u-boot reads a board specific devicetree at boot time to customize its boot process. A board can have both a dts source file and a dtsi include file. The example for the sockit board indicates this. The reader will need to create new custom dts and dtsi devicetree files for the custom board. The Makefile includes all the available board devicetree compiler build options. The reader will need to modify this file to support the new custom board. The Yocto u-boot recipe for the custom board will need to copy the modified Makefile and the created dts & dtsi files to the arch/arm/dts folder.

configs folder



This folder contains build configurations for all the boards supported by u-boot. The image above shows the build configuration defconfig file for the sockit board. Recall that the MACHINE configuration file selects the specific u-boot build configuration defconfig for the Yocto build with its UBOOT_CONFIG variable. The reader will need to create a new defconfig file specifically for the custom board. The Yocto u-boot recipe for the custom board will need to copy the created defconfig file to the configs folder.

include/configs folder



This folder contains a header file required to provide custom board features necessary for the u-boot build. It specifically provides the size of the physical DRAM on the board and the Linux load address in DRAM. The reader will need to provide a custom version of this file to support a new custom board. The Yocto u-boot recipe for the custom board will need to copy the created header file to the include/configs folder.

arch/arm/mach-socfpga folder



This folder contains a Kconfig file. This provides additional build configurations for u-boot socfpga based machines. The reader will need to modify this file to support a new custom board. The Yocto u-boot recipe for the custom board will need to copy the modified Kconfig file to the arch/arm/mach-socfpga folder.

Review custom u-boot recipe

Open the file socfpga_yocto_workshop/poky/meta-my-custom-soc-board/recipes-bsp/u-boot/u-boot-socfpga_v2021.04.bb in the default editor, gedit.



The files sub-directory referenced in the recipe above, contains all the created or modified files necessary to facilitate building u-boot for the custom board. The reader will review the files identifying necessary additions or modifications. The u-boot scripts declares the files in the local files sub-directory. It creates a qts folder in the u-boot source directory. Lastly it copies the files to their respective directories in the u-boot source folder.

Review the source files

Note: None of these files were created. Copies were made of their sockit board equivalents and modified accordingly.

File Initial source Modification
files/my-custom-soc-board/MAINTAINERS Copy of sockit board Modified lines 1,2, 4 and 5
files/my-custom-soc-board/Makefile Copy of sockit board none
files/my-custom-soc-board/socfpga.c Copy of sockit board none
files/my-custom-soc-board/qts/* Created by the qts_filter utility See the next section for details
files/Makefile Copy of sockit board Added line 359. Specify the custom board devicetree filename
files/socfpga_cyclone5_de10nano.dts Copy of de0nano board Modified lines 9 and 10. Modified led section to create one fpga led device
files/socfpga_cyclone5_datastormdaq.dts Copy of sockit board Modified lines 9 and 10. Modified led section to create two fpga led devices. Modified gmac section to support ADIN1300 Ethernet PHY.
files/socfpga_cyclone5_sockit.dts Copy of sockit board Modified lines 9 and 10
files/socfpga_cyclone5_de10nano-u-boot.dtsi Copy of sockit board none
files/socfpga_cyclone5_datastormdaq-u-boot.dtsi Copy of sockit board none
files/socfpga_cyclone5_sockit-u-boot.dtsi Copy of sockit board none
files/socfpga_de10nano_defconfig Copy of sockit board Modified line 8 . Used in Kconfig file to select board build target.
Modified line 12 and added line 13 . Enables and defines u-boot run-time BOOTCOMMAND. This will load the RBF file from the FAT partition into memory and configure the FPGA. Then it enables the HPS bridges to the FPGA. Lastly it initiates the Linux devicetree and Kernel boot sequence.
Modified line 14. Defines the Linux Kernel devicetree.
Modified line 9. Defines the u-boot devicetree
files/socfpga_datastorm_defconfig Copy of sockit board Modified line 8 . Used in Kconfig file to select board build target.
Modified line 12 and added line 13 . Enables and defines u-boot run-time BOOTCOMMAND. This will load the RBF file from the FAT partition into memory and configure the FPGA. Then it enables the HPS bridges to the FPGA. It also clears and sets the Ethernet and USB PHY reset signals using GPIO commands. Lastly it initiates the Linux devicetree and Kernel boot sequence.
Modified line 14. Defines the Linux Kernel devicetree.
Modified line 9. Defines the u-boot devicetree
files/socfpga_sockit_defconfig Copy of sockit board Modified line 8 . Used in Kconfig file to select board build target.
Modified line 12 and added line 13 . Enables and defines u-boot run-time BOOTCOMMAND. This will load the RBF file from the FAT partition into memory and configure the FPGA. Then it enables the HPS bridges to the FPGA. Lastly it initiates the Linux devicetree and Kernel boot sequence.
Modified line 14. Defines the Linux Kernel devicetree.
Modified line 9. Defines the u-boot devicetree
files/socfpga_my_custom_soc_board.h Copy of sockit board Modified lines 5,6 and 20 . Modify line 11 if the custom board has different density SDRAM
files/Kconfig Copy of sockit board Added lines 176 to 178. Direct u-boot build configuration based on Cyclone V socfpga device.
Added lines 223 and 241. Direct u-boot to source custom board files from the /board/custom/my-custom-soc/board folder.
Added line 264. Direct u-boot to source custom board include/configs custom header.

Copy u-boot device tree files

DE10-nano

    $ cd ~/socfpga-workshop/socfpga_yocto_workshop/poky/meta-my-custom-soc-board/recipes-bsp/u-boot/files/

    $ cp socfpga_cyclone5_de10nano.dts socfpga_cyclone5_my_custom_soc_board.dts

    $ cp socfpga_cyclone5_de10nano-u-boot.dtsi socfpga_cyclone5_my_custom_soc_board-u-boot.dtsi

DataStorm DAQ

    $ cd ~/socfpga-workshop/socfpga_yocto_workshop/poky/meta-my-custom-soc-board/recipes-bsp/u-boot/files/

    $ cp socfpga_cyclone5_datastormdaq.dts socfpga_cyclone5_my_custom_soc_board.dts

    $ cp socfpga_cyclone5_datastormdaq-u-boot.dtsi socfpga_cyclone5_my_custom_soc_board-u-boot.dtsi

SoCKit

    $ cd ~/socfpga-workshop/socfpga_yocto_workshop/poky/meta-my-custom-soc-board/recipes-bsp/u-boot/files/

    $ cp socfpga_cyclone5_sockit.dts socfpga_cyclone5_my_custom_soc_board.dts

    $ cp socfpga_cyclone5_sockit-u-boot.dtsi socfpga_cyclone5_my_custom_soc_board-u-boot.dtsi

Copy u-boot defconfig files

DE10-nano

    $ cp socfpga_de10nano_defconfig socfpga_my_custom_soc_board_defconfig

DataStorm DAQ

    $ cp socfpga_datastormdaq_defconfig socfpga_my_custom_soc_board_defconfig

SoCKit

    $ cp socfpga_sockit_defconfig socfpga_my_custom_soc_board_defconfig

Generate u-boot Custom Board source code based on the Quartus Handoff folder

The following steps guide the reader to create the custom source files for the /board/custom/my-custom-soc-board/qts u-boot folder.

Open an SoC EDS Embedded shell

Open an Embedded shell. Source the embedded_command_shell script

    $ ~/intelFPGA_lite/20.1/embedded/embedded_command_shell.sh

Generate source code with the bsp-editor

DE10-nano

    $ cd ~/socfpga-workshop/socfpga_hw_workshop/de10nano_ghrd/

    $ mkdir -p software/bootloader

DataStorm DAQ

    $ cd ~/socfpga-workshop/socfpga_hw_workshop/datastormdaq_ghrd/

    $ mkdir -p software/bootloader

SoCKit

    $ cd ~/socfpga-workshop/socfpga_hw_workshop/sockit_ghrd/

    $ mkdir -p software/bootloader

Run bsp-create-settings with no user options to convert the handoff data into source code

DE10-nano

    $ bsp-create-settings --type spl --bsp-dir software/bootloader --preloader-settings-dir "hps_isw_handoff/de10nano_ghrd_hps_0" --settings software/bootloader/settings.bsp

DataStorm DAQ

    $ bsp-create-settings --type spl --bsp-dir software/bootloader --preloader-settings-dir "hps_isw_handoff/datastormdaq_ghrd_hps_0" --settings software/bootloader/settings.bsp

SoCKit

    $ bsp-create-settings --type spl --bsp-dir software/bootloader --preloader-settings-dir "hps_isw_handoff/sockit_ghrd_hps_0" --settings software/bootloader/settings.bsp

Retrieve the qts-filter utility

    $ cd software/bootloader

    $ git clone -b socfpga_v2021.04 https://github.com/arrow-socfpga/u-boot-socfpga

    $ cd u-boot-socfpga

Generate source code with the qts-filter

Run the qts_filter to take the sources from the handoff folder and the ones generated by bsp-create-settings, format them appropriately, and copy them to the u-boot qts source code folder in the custom layer.

    $ ./arch/arm/mach-socfpga/qts-filter.sh cyclone5  ../../../ ../  ~/socfpga-workshop/socfpga_yocto_workshop/poky/meta-my-custom-soc-board/recipes-bsp/u-boot/files/my-custom-soc-board/qts/



Next - Review the Linux Kernel recipe

Return to - Review FPGA configuration recipe

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