Getting Started with the DataStorm DAQ board - ArrowElectronics/arrow-soc-workshops GitHub Wiki

Overview

The Intel PSG SoC combines a Hard Processing System (HPS) and an FPGA on a single device. The HPS has dual core ARM Cortex-A9 Microprocessor Unit (MPU) and a host of peripherals such as DDR3 controllers, Ethernet MACs, SPI controllers, and many more.

The FPGA portion of the device is tightly coupled through high performance bridges to the HPS. The designer can add peripherals they create or third-party IP to the FPGA and map it into the HPS. Thus, you have a flexible and very powerful solution.

The HPS is configured using Platform Designer, Intel PSG's SoC/FPGA IP integration tool. Configuration includes selecting DDR memory, determining clock frequencies, and selecting which HPS peripherals your design will use.

Platform Designer is also used to define the HPS peripheral pin outs; Quartus is used to define the FPGA peripheral pin outs. These two Intel PSG FPGA development tools generate the files needed for the transfer of design information from the hardware to the software domain.

Acquire the DataStorm DAQ

If you don't already have a DataStorm DAQ, it can be purchased from Arrow here: Arrow's DataStorm DAQ

Get the Cyclone V DataStorm DAQ ready for the Labs

Connect cables to the connectors shown in the diagram below. All cables are provided with your DataStorm DAQ.

  • Connect the micro USB cable to the USB host connector on your laptop and to the J13 connector on the DataStorm DAQ.
  • Connect the Power Supply to the Power connector on the DataStorm DAQ. Do not power on the board at this time.

There are a few jumpers that require configuring before proceeding with the labs.

  • BOOTSEL[1..0] jumpers. These should be configured as "01" to select boot from SD card 3.3V

Ensure that the jumpers are configured as indicated below.

Connect the USB Blaster as a device to the VM

  • Turn your DatStorm DAQ board on by plugging the power adapter into an AC outlet.

  • Connect the Blaster to the Virtual Machine. From within the VM press

    Player --> Removable Devices --> Future Devices Arrow USB Blaster --> Connect (Disconnect from Host)

  • Open a shell (Ctrl + Alt + T)

    $ ~/intelFPGA_lite/20.1/nios2eds/nios2_command_shell.sh 

$ ~/intelFPGA_lite/20.1/quartus/bin/jtagconfig

  • Type jtagconfig at the prompt and press enter.

  • If the jtagconfig command fails (“No JTAG hardware available”message), then the driver is not installed.

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